Datasheet

AD9547 Data Sheet
Rev. E | Page 2 of 104
TABLE OF CONTENTS
Features .....................................................................................1
Applications...............................................................................1
General Description ..................................................................1
Functional Block Diagram .........................................................1
Revision History ........................................................................3
Specifications .............................................................................4
Supply Voltage .......................................................................4
Supply Current.......................................................................4
Power Dissipation ..................................................................4
Logic Inputs (M0 to M7, RESET)...........................................5
Logic Outputs (M0 to M7, IRQ) ............................................5
System Clock Inputs (SYSCLKP, SYSCLKN) .........................5
Distribution Clock Inputs (CLKINP, CLKINN).....................6
Reference Inputs (REFA/REFAA, REFB/REFBB)...................7
Reference Monitors ................................................................7
Reference Switchover Specifications ......................................8
Distribution Clock Outputs (OUT0, OUT1) .........................8
DAC Output Characteristics (DACOUTP, DACOUTN) .......9
Time Duration of Digital Functions.....................................10
Digital PLL...........................................................................10
Digital PLL Lock Detection .................................................10
Holdover Specifications .......................................................10
Serial Port Specifications—SPI Mode ..................................11
Serial Port Specifications—I
2
C Mode...................................12
Jitter Generation ..................................................................13
Absolute Maximum Ratings ....................................................14
ESD Caution ........................................................................14
Pin Configuration and Function Descriptions.........................15
Typical Performance Characteristics .......................................18
Input/Output Termination Recommendations ........................23
Getting Started.........................................................................24
Power-On Reset ...................................................................24
Initial M0 to M7 Pin Programming .....................................24
Device Register Programming .............................................24
Theory of Operation ................................................................26
Overview .............................................................................26
Reference Clock Inputs ........................................................27
Reference Monitors ..............................................................27
Reference Profiles ................................................................28
Reference Switchover ...........................................................30
Digital Phase-Locked Loop (DPLL) Core ............................ 32
Direct Digital Synthesizer (DDS)......................................... 34
Tuning Word Processing...................................................... 35
Loop Control State Machine ................................................ 36
System Clock Inputs ............................................................ 37
SYSCLK PLL Multiplier ....................................................... 38
Clock Distribution ............................................................... 39
Status and Control ................................................................... 44
Multifunction Pins (M0 to M7) ........................................... 44
IRQ Pin................................................................................ 45
Watchdog Timer .................................................................. 45
EEPROM ............................................................................. 46
Serial Control Port .................................................................. 50
SPI/I
2
C Port Selection .......................................................... 50
SPI Serial Port Operation..................................................... 50
I²C Serial Port Operation..................................................... 55
I/O Programming Registers..................................................... 58
Buffered/Active Registers .................................................... 58
Autoclearing Registers ......................................................... 58
Register Access Restrictions................................................. 58
Register Map ........................................................................... 59
Register Bit Descriptions ......................................................... 68
Serial Port Configuration and Part Identification
(Register 0x0000 to Register 0x0005)................................... 68
System Clock (SYSCLK) (Register 0x0100 to
Register 0x0108) .................................................................. 69
General Configuration (Register 0x0200 to
Register 0x0214) .................................................................. 70
DPLL Configuration (Register 0x0300 to
Register 0x031B).................................................................. 73
Clock Distribution Output Configuration (Register 0x0400
to Register 0x0417) .............................................................. 75
Reference Input Configuration (Register 0x0500 to
Register 0x0507) ................................................................... 77
Profile Registers (Register 0x0600 to Register 0x07FF)........ 79
Operational Controls (Register 0x0A00 to
Register 0x0A10) ................................................................. 88
Clock Part Serial ID (Register 0x0C00 to
Register 0x0C07) ................................................................. 92
Status Readback (Register 0x0D00 to Register 0x0D19) ...... 93
Nonvolatile Memory (EEPROM) Control (Register 0x0E00 to
Register 0x0E03) .................................................................. 95