Datasheet

Data Sheet AD9547
Rev. E | Page 101 of 104
CALCULATING THE DIGITAL FILTER COEFFICIENTS
The digital loop filter coefficients (α, β, γ, and δ, as shown in
Figure 39) relate to the time constants (T
1
, T
2
, and T
3
) that are
associated with the equivalent analog circuit for a third-order loop
filter (see Figure 66). Note that AD9547 evaluation software
contains a profile designer that will compute these coefficients
for you.
R2
FROM
CHARGE
PUMP
TO
VCO
R3
C3
C1
C2
08300-042
Figure 66. Third-Order Analog Loop Filter
The design process begins by deciding on two design parameters
related to the second-order loop filter shown in Figure 67: the
desired open-loop bandwidth (f
P
) and the phase margin (.
R2
FROM
CHARGE
PUMP
TO
VCO
C1
C2
08300-043
Figure 67. Second-Order Analog Loop Filter
An analysis of the second-order loop filter leads to its primary
time constant, T
1
. It can be shown that T
1
is expressible in terms
of f
P
and as
)cos(
)sin(1
P
1
ω
T where
ω
p
= 2πf
P
An analysis of the third-order loop filter leads to the definition
of another time constant, T
3
. It can be shown that T
3
is expressible
in terms of the desired amount of additional attenuation intro-
duced by R
3
and C
3
at some specified frequency offset (f
OFFSET
)
from the PLL output frequency.
OFFSET
ATTEN
3
ω
T
110
10
where
ω
OFFSET
= f
OFFSET
Note that ATTEN is the desired excess attenuation in decibels (dB).
Furthermore, ATTEN and ω
OFFSET
should be chosen so that
P
3
f
T
5
1
With an expression for T
1
and T
3
, it is possible to define an adjusted
open-loop bandwidth (f
C
) that is slightly less than f
P
. It can be
shown that ω
C
(f
C
expressed as a radian frequency) is expressible
in terms of T
1
, T
3
, and θ (phase margin) as follows:





1
)tan(
1
)tan(
2
2
2
31
3131
3131
31
C
TT
TTTT
TTTT
TT
ω
It can also be shown that the adjusted open-loop bandwidth
leads to T
2
(the secondary time constant of the second-order
loop filter), which is expressed as

31
C
2
TTω
T
2
1
Calculation of the digital loop filter coefficients requires a
scaling constant, K (related to the system clock frequency, f
S
),
and the PLL feedback divide ratio, D.
S
fK
33
2
125,578,517,30
1
V
U
SD
where
S, U, and V are the integer and fractional feedback divider
values that reside in the profile registers.
Keep in mind that the desired integer feedback divide ratio is one
more than the stored value of S (hence, the +1 term in the
equation for D in this equation). This leads to the digital filter
coefficients given by



2
22
1
11
2
C
3
C
1
C
1
2
2
C
Tω
TωTω
KT
DTω
α
21
S
TTf
β
1132
1
S
Tf
γ
32
3
S
Tf
δ
32
Calculation of the coefficient register values requires the appli-
cation of some special functions, which are described as follows:
The if() function
y = if (test_statement, true_value, false_value)
where:
test_statement is a conditional expression (for example, x < 3).
true_value is what y equals if the conditional expression is true.
false_value is what y equals if the conditional expression is false.
The round() function
y = round(x)
If x is an integer, then y = x. Otherwise, y is the nearest integer to x.
For example, round(2.1) = 2, round(2.5) = 3, and round(−3.1) = −3.
The ceil() function
y = ceil(x)
If x is an integer, then y = x. Otherwise, y is the next integer to
the right on the number line. For example, ceil(2.8) = 3,
whereas ceil(−2.8) = −2.