Datasheet

AD9524 Data Sheet
Rev. D | Page 56 of 56
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2
1
48
12
13
37
36
24
25
5.25
5.10 SQ
4.95
0.50
0.40
0.30
0.30
0.23
0.18
0.80 MAX
0.65 TYP
5.50 REF
COPLANARITY
0.08
0.20 REF
1.00
0.85
0.80
0.05 MAX
0.02 NOM
SEATING
PLANE
12° MAX
TOP VIEW
0.60 MAX
0.60 MAX
PIN 1
INDICATOR
0.50
REF
PIN 1
INDICATOR
0.25 MIN
7.10
7.00 SQ
6.90
6.85
6.75 SQ
6.65
06-05-2012-A
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
EXPOSED
PA D
Figure 45. 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
7 × 7 mm Body, Very Thin Quad
(CP-48-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option
AD9524BCPZ −40°C to +85°C 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-48-1
AD9524BCPZ-REEL7 −40°C to +85°C 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-48-1
AD9524/PCBZ Evaluation Board
1
Z = RoHS Compliant Part.
I
2
C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
©2010–2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09081-0-2/13(D)