Datasheet

Data Sheet AD9523
Rev. C | Page 11 of 60
Parameter Min Typ Max Unit Test Conditions/Comments
SCL, SDA Fall Time, t
FAL L
20 + 0.1 C
B
1
300 ns
Data Setup Time, t
SE T; DAT
100 ns
Data Hold Time, t
HL D; D AT
100 880 ns This is a minor deviation from the original I²C
specification of 0 ns minimum
2
Capacitive Load for Each Bus Line, C
B
1
400 pF
1
C
B
is the capacitance of one bus line in picofarads (pF).
2
According to the original I
2
C specification, an I
2
C master must also provide a minimum hold time of 300 ns for the SDA signal to bridge the undefined region of the SCL
falling edge.