Datasheet

AD9522-1
Rev. 0 | Page 67 of 84
Table 52. PLL
Reg.
Addr
(Hex) Bit(s) Name Description
010 [7] PFD polarity
Sets the PFD polarity. Negative polarity is for use (if needed) with external VCO/VCXO only.
The on-chip VCO requires positive polarity, [7] = 0.
[7] = 0; positive (higher control voltage produces higher frequency) (default).
[7] = 1; negative (higher control voltage produces lower frequency).
010 [6:4] CP current Charge pump current (with CPRSET = 5.1 kΩ).
[6] [5] [4] I
CP
(mA)
0 0 0 0.6
0 0 1 1.2
0 1 0 1.8
0 1 1 2.4
1 0 0 3.0
1 0 1 3.6
1 1 0 4.2
1 1 1 4.8 (default)
010 [3:2] CP mode Charge pump operating mode.
[3] [2] Charge Pump Mode
0 0 High impedance state.
0 1 Force source current (pump up).
1 0 Force sink current (pump down).
1 1 Normal operation (default).
010 [1:0]
PLL power-
down
PLL operating mode.
[1] [0] Mode
0 0 Normal operation; this mode must be selected to use the PLL.
0 1 Asynchronous power-down (default).
1 0 Unused.
1 1 Synchronous power-down.
011 [7:0]
14-bit R counter,
Bits[7:0] (LSB)
Reference divider LSBs—lower eight bits. The reference divider (also called the R divider or R counter) is
14 bits long. The lower eight bits are in this register (default: 0x01).
012 [5:0]
14-bit R counter,
Bits[13:8] (MSB)
Reference divider MSBs—upper six bits. The reference divider (also called the R divider or R counter) is
14 bits long. The upper six bits are in this register (default: 0x00).
013 [5:0] 6-bit A counter A counter (part of N divider). The N divider is also called the feedback divider (default: 0x00).
014 [7:0]
13-bit B counter,
Bits[7:0] (LSB)
B counter (part of N divider)—lower eight bits. The N divider is also called the feedback divider (default: 0x03).
015 [4:0]
13-bit B counter,
Bits[12:8] (MSB)
B counter (part of N divider)—upper five bits. The N divider is also called the feedback divider (default: 0x00).
016 [7]
Set CP pin
to VCP/2
Sets the CP pin to one-half of the VCP supply voltage.
[7] = 0; CP normal operation (default).
[7] = 1; CP pin set to VCP/2.
016 [6] Reset R counter Reset R counter (R divider).
[6] = 0; normal (default).
[6] = 1; hold R counter in reset.
016 [5]
Reset A and B
counters
Reset A and B counters (part of N divider).
[5] = 0; normal (default).
[5] = 1; hold A and B counters in reset.
016 [4]
Reset all
counters
Reset R, A, and B counters.
[4] = 0; normal (default).
[4] = 1; hold R, A, and B counters in reset.