Datasheet

AD9520-5 Data Sheet
Rev. A | Page 4 of 76
SPECIFICATIONS
Typical is given for V
S
= V
S_DRV
= 3.3 V ± 5%; V
S
V
CP
5.25 V; T
A
= 25°C; R
SET
= 4.12 kΩ; CP
RSET
= 5.1 kΩ, unless otherwise noted. Minimum
and maximum values are given over full V
S
and T
A
(−40°C to +85°C) variation.
POWER SUPPLY REQUIREMENTS
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
POWER PINS
VS 3.135 3.3 3.465 V 3.3 V ± 5%
VS_DRV 2.375 V
S
V Nominally 2.5 V to 3.3 V ± 5%
VCP V
S
5.25 V Nominally 3.3 V to 5.0 V ± 5%
CURRENT SET RESISTORS
RSET Pin Resistor
4.12
Sets internal biasing currents; connect to ground
CPRSET Pin Resistor 5.1 Sets internal CP current range, nominally 4.8 mA
(CP_lsb = 600 µA); actual current can be calculated
by CP_lsb = 3.06/CP
RSET
; connect to ground
PLL CHARACTERISTICS
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
REFERENCE INPUTS
Differential Mode (REFIN,
REFIN
) Differential mode (can accommodate single-ended
input by ac grounding undriven input)
Input Frequency 0 250 MHz Frequencies below about 1 MHz should be dc-
coupled; be careful to match V
CM
(self-bias voltage)
Input Sensitivity 280 mV p-
p
PLL figure of merit (FOM) increases with increasing
slew rate (see Figure 11); the input sensitivity is
sufficient for ac-coupled LVDS and LVPECL signals
Self-Bias Voltage, REFIN 1.35 1.60 1.75 V Self-bias voltage of REFIN
1
Self-Bias Voltage,
REFIN
1.30 1.50 1.60 V Self-bias voltage of
REFIN
1
Input Resistance, REFIN 4.0 4.8 5.9 Self-biased
1
Input Resistance,
REFIN
4.4 5.3 6.4 Self-biased
1
Dual Single-Ended Mode (REF1, REF2) Two single-ended CMOS-compatible inputs
Input Frequency (AC-Coupled with
DC Offset Off)
10 250 MHz Slew rate must be >50 V/µs
Input Frequency (AC-Coupled with
DC Offset On)
250 MHz Slew rate must be >50 V/µs, and input amplitude
sensitivity specification must be met; see the input
sensitivity parameter
Input Frequency (DC-Coupled) 0 250 MHz Slew rate > 50 V/µs; CMOS levels
Input Sensitivity (AC-Coupled
with DC Offset Off)
0.55 3.28 V p-p V
IH
should not exceed V
S
Input Sensitivity (AC-Coupled with
DC Offset On)
1.5 2.78 V p-p V
IH
should not exceed V
S
Input Logic High, DC Offset Off 2.0 V
Input Logic Low, DC Offset Off 0.8 V
Input Current −100 +100 µA
Input Capacitance 2 pF Each pin, REFIN (REF1)/
REFIN
(REF2)
Pulse Width High/Low 1.8 ns The amount of time that a square wave is high/low;
determines the allowable input duty cycle
Crystal Oscillator
Crystal Resonator Frequency Range 16.62 33.33 MHz
Maximum Crystal Motional Resistance 30 Ω