Datasheet
AD9520-3 Data Sheet
Rev. A | Page 80 of 80
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-220-VMMD-4
0.25 MIN
1
64
16
17
49
48
32
33
0.50
0.40
0.30
0.50
BSC
0.20 REF
12° MAX
0.80 MAX
0.65 TYP
1.00
0.85
0.80
7.50 REF
0.05 MAX
0.02 NOM
0.60 MAX
0.60
MAX
SEATING
PLANE
PIN 1
INDICATOR
6.35
6.20 SQ
6.05
PIN 1
INDICATOR
0.30
0.25
0.18
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
TOP VIEW
EXPOSED
PAD
BOTTOM VIEW
9.10
9.00 SQ
8.90
8.85
8.75 SQ
8.65
06-12-2012-B
Figure 76. 64-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
9 mm × 9 mm Body, Very Thin Quad
CP-64-4
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option
AD9520-3BCPZ −40°C to +85°C 64-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-64-4
AD9520-3BCPZ-REEL7 −40°C to +85°C 64-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-64-4
AD9520-3/PCBZ Evaluation Board
1
Z = RoHS Compliant Part.
I
2
C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
©2008–2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07216-0-8/13(A)