Datasheet

AD9520-0 Data Sheet
Rev. A | Page 62 of 80
Addr.
(Hex)
Parameter Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
Default
Value
(Hex)
Output Driver Control
0x0F0 OUT0 control OUT0 format OUT0 CMOS
configuration
OUT0 polarity OUT0 LVPECL
differential voltage
OUT0 LVPECL
power-down
0x64
0x0F1 OUT1 control OUT1 format OUT1 CMOS
configuration
OUT1 polarity OUT1 LVPECL
differential voltage
OUT1 LVPECL
power-down
0x64
0x0F2 OUT2 control OUT2 format OUT2 CMOS
configuration
OUT2 polarity OUT2 LVPECL
differential voltage
OUT2 LVPECL
power-down
0x64
0x0F3 OUT3 control OUT3 format OUT3 CMOS
configuration
OUT3 polarity OUT3 LVPECL
differential voltage
OUT3 LVPECL
power-down
0x64
0x0F4 OUT4 control OUT4 format OUT4 CMOS
configuration
OUT4 polarity OUT4 LVPECL
differential voltage
OUT4 LVPECL
power-down
0x64
0x0F5 OUT5 control OUT5 format OUT5 CMOS
configuration
OUT5 polarity OUT5 LVPECL
differential voltage
OUT5 LVPECL
power-down
0x64
0x0F6 OUT6 control OUT6 format OUT6 CMOS
configuration
OUT6 polarity OUT6 LVPECL
differential voltage
OUT6 LVPECL
power-down
0x64
0x0F7 OUT7 control OUT7 format OUT7 CMOS
configuration
OUT7 polarity OUT7 LVPECL
differential voltage
OUT7 LVPECL
power-down
0x64
0x0F8 OUT8 control OUT8 format OUT8 CMOS
configuration
OUT8 polarity OUT8 LVPECL
differential voltage
OUT8 LVPECL
power-down
0x64
0x0F9 OUT9 control OUT9 format OUT9 CMOS
configuration
OUT9 polarity OUT9 LVPECL
differential voltage
OUT9 LVPECL
power-down
0x64
0x0FA OUT10 control OUT10 format OUT10 CMOS
configuration
OUT10 polarity OUT10 LVPECL
differential voltage
OUT10 LVPECL
power-down
0x64
0x0FB OUT11 control OUT11 format OUT11 CMOS
configuration
OUT11 polarity OUT11 LVPECL
differential voltage
OUT11 LVPECL
power-down
0x64
0x0FC
Enable output
on CSDLD
CSDLD en
OUT7
CSDLD en
OUT6
CSDLD en
OUT5
CSDLD en
OUT4
CSDLD en
OUT3
CSDLD en
OUT2
CSDLD en
OUT1
CSDLD en
OUT0
0x00
0x0FD Unused Unused Unused Unused CSDLD en
OUT11
CSDLD en
OUT10
CSDLD en
OUT9
CSDLD en
OUT8
0x00
0x0FE
to
0x18F
Unused
Unused
0x00
LVPECL Channel Dividers
0x190 Divider 0 (PECL) Divider 0 low cycles Divider 0 high cycles 0x77
0x191 Divider 0 bypass Divider 0
ignore
SYNC
Divider 0
force high
Divider 0
start high
Divider 0
phase offset
0x00
0x192 Unused Unused Channel 0
power-
down
Channel 0
direct to
output
Disable
Divider 0
DCC
0x00
0x193 Divider 1 (PECL) Divider 1 low cycles Divider 1 high cycles 0x33
0x194 Divider 1 bypass Divider 1
ignore
SYNC
Divider 1
force high
Divider 1
start high
Divider 1 phase offset 0x00
0x195 Unused Unused Channel 1
power-
down
Channel 1
direct to
output
Disable
Divider 1
DCC
0x00
0x196 Divider 2 (PECL) Divider 2 low cycles Divider 2 high cycles 0x11
0x197 Divider 2 bypass Divider 2
ignore
SYNC
Divider 2
force high
Divider 2
start high
Divider 2 phase offset 0x00
0x198 Unused Unused Channel 2
power-
down
Channel 2
direct to
output
Disable
Divider 2
DCC
0x00
0x199 Divider 3 (PECL) Divider 3 low cycles Divider 3 high cycles 0x00
0x19A Divider 3 bypass Divider 3
ignore
SYNC
Divider 3
force high
Divider 3
start high
Divider 3 phase offset 0x00
0x19B Unused Unused Channel 3
power-
down
Channel 3
direct to
output
Disable
Divider 3
DCC
0x00
0x19C
to
0x1DF
Unused Unused 0x00