Datasheet

AD9518-3 Data Sheet
Rev. B | Page 12 of 64
TIMING DIAGRAMS
DIFFERENTIAL
LVPECL
80%
20%
t
RP
t
FP
06432-061
CL
K
t
CLK
t
PECL
06432-060
Figure 2. CLK/
CLK
to Clock Output Timing, DIV = 1
Figure 3. LVPECL Timing, Differential