Datasheet

Data Sheet AD9517-4
Rev. E | Page 3 of 80
REVISION HISTORY
3/13—Rev. D to Rev. E
Changes to Table 52 ........................................................................ 57
Changes to Table 57 ........................................................................ 70
1/12—Rev. C to Rev. D
Changes to Table 62 ........................................................................ 75
5/11—Rev. B to Rev. C
Changes to Features, Applications, and General Description
Sections ............................................................................................... 1
Change to CPRSET Pin Resistor Parameter, Table 1 .................... 4
Changes to Table 2 ............................................................................ 4
Changes to Table 4 ............................................................................ 6
Changes to Logic 1 Current and Logic 0 Current
Parameters, Table 15 ....................................................................... 14
Changes to Table 20 ........................................................................ 18
Change to Caption, Figure 8 .......................................................... 20
Change to Caption, Figure 15 ........................................................ 21
Change to Captions, Figure 25 and Figure 26 ............................. 23
Added Figure 41; Renumbered Sequentially ............................... 25
Changes to On-Chip VCO Section ............................................... 34
Changes to Reference Switchover Section ................................... 35
Changes to Prescaler Section and Change to
Comments/Conditions Column, Table 28 ................................... 36
Changes to Automatic/Internal Holdover Mode Section
and Frequency Status Monitors Section ....................................... 39
Changes to VCO Calibration Section ........................................... 40
Changes to Clock Distribution Section ........................................ 41
Changes to Write Section ............................................................... 51
Change to The Instruction Word (16 Bits) Section .................... 52
Change to Figure 65 ........................................................................ 53
Change to Thermal Performance Section .................................... 55
Changes to Register Address 0x01C, Bits[4:3], Table 52 ............ 56
Changes to Address 0x017, Bits[1:0] and Address 0x018,
Bits[2:0], Table 54 ............................................................................ 62
Changes to Register Address 0x01C, Bits[5:1], Table 54 ............ 64
Change to LVPECL Clock Distribution Section ......................... 77
5/10—Rev. A to Rev. B
Changes to Default Values of LVDS/CMOS Outputs
Section in Table 52 .......................................................................... 56
Changes to Register 0x140, Bit 0; Register 0x142, Bit 0;
Register 0x143, Bit 0 in Table 57 ................................................... 69
Updated Outline Dimensions, Changes to Ordering Guide ..... 78
1/10—Rev. 0 to Rev. A
Added 48-Lead LFCSP Package (CP-48-8) .................... Universal
Changes to Features, Applications, and General Description ..... 1
Change to CPRSET Pin Resistor Parameter .................................. 4
Changes to Table 4 ............................................................................ 6
Changes to V
CP
Supply Parameter ................................................. 14
Changes to Table 19 ........................................................................ 16
Added Exposed Paddle Notation to Figure 6; Changes to
Table 20 ............................................................................................. 17
Change to High Frequency Clock Distribution—CLK or
External VCO > 1600 MHz Section; Change to Table 22 .......... 27
Changes to Table 24 ........................................................................ 29
Change to Configuration and Register Settings Section ........... 31
Change to Phase Frequency Detector (PFD) Section ................ 32
Changes to Charge Pump (CP), On-Chip VCO, PLL
External Loop Filter, and PLL Reference Inputs Sections ......... 33
Change to Figure 46; Added Figure 47 ......................................... 33
Changes to Reference Switchover and VCXO/VCO
Feedback Divider N—P, A, B, R Sections .................................... 34
Changes to Table 28 ........................................................................ 35
Change to Holdover Section .......................................................... 37
Changes to VCO Calibration Section ........................................... 39
Changes to Clock Distribution Section ........................................ 40
Change to Clock Frequency Division Section;
Change to Table 34 .......................................................................... 41
Changes to Channel Dividers—LVDS/CMOS Outputs
Section; Change to Table 39 ........................................................... 43
Change to Write Section ................................................................ 50
Change to MSB/LSB First Transfers ............................................. 51
Change to Figure 64 ........................................................................ 52
Added Thermal Performance Section .......................................... 54
Changes to 0x003 Register Address .............................................. 55
Changes to Table 53 ........................................................................ 58
Changes to Table 54 ........................................................................ 59
Changes to Table 55 ........................................................................ 65
Changes to Table 56 ........................................................................ 67
Changes to Table 57 ........................................................................ 69
Changes to Table 58 ........................................................................ 71
Changes to Table 59 ........................................................................ 72
Changes to Table 60 and Table 61 ................................................. 74
Added Frequency Planning Using the AD9517 Section ............ 75
Changes to Figure 70 and Figure 72; Added Figure 71 .............. 76
Changes to LVDS Clock Distribution Section ............................ 76
Added Exposed Paddle Notation to Outline Dimensions ......... 78
Changes to Ordering Guide ........................................................... 78
7/07—Revision 0: Initial Version