Datasheet

AD9517-1 Data Sheet
Rev. E | Page 64 of 80
Reg.
Addr.
(Hex) Bits Name Description
0x01B 7 VCO Enables or disables VCO frequency monitor.
frequency monitor 0: disables VCO frequency monitor (default).
1: enables VCO frequency monitor.
6
REF2 (
REFIN
)
Enables or disables REF2 frequency monitor.
frequency monitor 0: disables REF2 frequency monitor (default).
1: enables REF2 frequency monitor.
5 REF1 (REFIN)
frequency monitor
REF1 (REFIN) frequency monitor enable; this is for both REF1 (single-ended) and REFIN (differential) inputs
(as selected by differential reference mode).
0: disables REF1 (REFIN) frequency monitor (default).
1: enables REF1 (REFIN) frequency monitor.
[4:0] REFMON Selects the signal that is connected to the REFMON pin.
pin control
4 3 2 1 0
Level or
Dynamic
Signal
Signal at REFMON Pin
0 0 0 0 0 LVL Ground (dc) (default).
0 0 0 0 1 DYN REF1 clock (differential reference when in differential mode).
0 0 0 1 0 DYN REF2 clock (not available in differential mode).
0 0 0 1 1 DYN Selected reference to PLL (differential reference when in differential mode).
0 0 1 0 0 DYN Unselected reference to PLL (not available in differential mode).
0 0 1 0 1 LVL Status of selected reference (status of differential reference); active high.
0 0 1 1 0 LVL Status of unselected reference (not available in differential mode); active high.
0 0 1 1 1 LVL Status REF1 frequency (active high).
0 1 0 0 0 LVL Status REF2 frequency (active high).
0 1 0 0 1 LVL (Status REF1 frequency) AND (status REF2 frequency).
0 1 0 1 0 LVL (DLD) AND (status of selected reference) AND (status of VCO).
0 1 0 1 1 LVL Status of VCO frequency (active high).
0 1 1 0 0 LVL Selected reference (low = REF1, high = REF2).
0 1 1 0 1 LVL Digital lock detect (DLD); active low.
0 1 1 1 0 LVL Holdover active (active high).
0 1 1 1 1 LVL LD pin comparator output (active high).
1 0 0 0 0 LVL VS (PLL supply).
1 0 0 0 1 DYN REF1 clock
(differential reference when in differential mode).
1 0 0 1 0 DYN REF2 clock
(not available in differential mode).
1 0 0 1 1 DYN Selected reference to PLL
(differential reference when in differential mode).
1 0 1 0 0 DYN Unselected reference to PLL
(not available in differential mode).
1 0 1 0 1 LVL Status of selected reference (status of differential reference); active low.
1 0 1 1 0 LVL Status of unselected reference (not available in differential mode); active low.
1 0 1 1 1 LVL Status of REF1 frequency (active low).
1 1 0 0 0 LVL Status of REF2 frequency (active low).
1 1 0 0 1 LVL (Status of REF1 frequency) AND (Status of REF2 frequency)
.
1 1 0 1 0 LVL (DLD) AND (Status of selected reference) AND (Status of VCO)
.
1 1 0 1 1 LVL Status of VCO frequency (active low).
1 1 1 0 0 LVL Selected reference (low = REF2, high = REF1).
1 1 1 0 1 LVL Digital lock detect (DLD); active low.
1 1 1 1 0 LVL Holdover active (active low).
1 1 1 1 1 LVL LD pin comparator output (active low).
0x01C 7 Disable Disables or enables the switchover deglitch circuit.
switchover 0: enables switchover deglitch circuit (default).
deglitch 1: disables switchover deglitch circuit.
6 Select REF2 If Register 0x01C, Bit 5 = 0b, selects reference for PLL.
0: selects REF1 (default).
1: selects REF2.
5 Use REF_SEL pin Sets method of PLL reference selection.
0: uses Register 0x01C, Bit 6 (default).
1: uses REF_SEL pin.
[4:3] Reserved Reserved (default: 00b).