Datasheet

Data Sheet AD9517-1
Rev. E | Page 57 of 80
Reg.
Addr
(Hex) Parameter Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
Default
Value
(Hex)
Fine Delay Adjust—OUT4 to OUT7
0x0A0 OUT4 delay
bypass
Blank OUT4 delay
bypass
0x01
0x0A1 OUT4 delay
full-scale
Blank OUT4 ramp capacitors OUT4 ramp current 0x00
0x0A2 OUT4 delay
fraction
Blank OUT4 delay fraction 0x00
0x0A3 OUT5 delay
bypass
Blank OUT5 delay
bypass
0x01
0x0A4 OUT5 delay
full-scale
Blank OUT5 ramp capacitors OUT5 ramp current 0x00
0x0A5 OUT5 delay
fraction
Blank OUT5 delay fraction 0x00
0x0A6 OUT6 delay
bypass
Blank OUT6 delay
bypass
0x01
0x0A7 OUT6 delay
full-scale
Blank OUT6 ramp capacitors OUT6 ramp current 0x00
0x0A8 OUT6 delay
fraction
Blank OUT6 delay fraction 0x00
0x0A9 OUT7 delay
bypass
Blank OUT7 delay
bypass
0x01
0x0AA OUT7 delay
full-scale
Blank OUT7 ramp capacitors OUT7 ramp current 0x00
0x0AB OUT7 delay
fraction
Blank OUT7 delay fraction 0x00
0x0AC
to
0x0EF
Blank
LVPECL Outputs
0x0F0 OUT0 Blank OUT0
invert
OUT0 LVPECL
differential voltage
OUT0 power-down 0x08
0x0F1 OUT1 Blank OUT1
invert
OUT1 LVPECL
differential voltage
OUT1 power-down 0x0A
0x0F2,
0x0F3
Reserved
0x0F4 OUT2 Blank OUT2
invert
OUT2 LVPECL
differential voltage
OUT2 power-down 0x08
0x0F5 OUT3 Blank OUT3
invert
OUT3 LVPECL
differential voltage
OUT3 power-down 0x0A
0x0F6
to
0x13F
Blank
LVDS/CMOS Outputs
0x140 OUT4 OUT4 CMOS
output polarity
OUT4 LVDS/
CMOS
output
polarity
OUT4
CMOS B
OUT4 select
LVDS/CMOS
OUT4 LVDS
output current
OUT4
power-down
0x42
0x141 OUT5 OUT5 CMOS
output polarity
OUT5 LVDS/
CMOS
output
polarity
OUT5
CMOS B
OUT5 select
LVDS/CMOS
OUT5 LVDS
output current
OUT5
power-down
0x43
0x142 OUT6 OUT6 CMOS
output polarity
OUT6 LVDS/
CMOS
output
polarity
OUT6
CMOS B
OUT6 select
LVDS/CMOS
OUT6 LVDS
output current
OUT6
power-down
0x42
0x143 OUT7 OUT7 CMOS
output polarity
OUT7 LVDS/
CMOS
output
polarity
OUT7
CMOS B
OUT7 select
LVDS/CMOS
OUT7 LVDS
output current
OUT7
power-down
0x43
0x144
to
0x18F
Blank