Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Functional Block Diagram
- Revision History
- Specifications
- Power Supply Requirements
- PLL Characteristics
- Clock Inputs
- Clock Outputs
- Timing Characteristics
- Clock Output Additive Phase Noise (Distribution Only; VCO Divider Not Used)
- Clock Output Absolute Phase Noise (Internal VCO Used)
- Clock Output Absolute Time Jitter (Clock Generation Using Internal VCO)
- Clock Output Absolute Time Jitter (Clock Cleanup Using Internal VCO)
- Clock Output Absolute Time Jitter (Clock Generation Using External VCXO)
- Clock Output Additive Time Jitter (VCO Divider Not Used)
- Clock Output Additive Time Jitter (VCO Divider Used)
- Delay Block Additive Time Jitter
- Serial Control Port
- PD, RESET, and SYNC Pins
- LD, STATUS, and REFMON Pins
- Power Dissipation
- Timing Diagrams
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Terminology
- Detailed Block Diagram
- Theory of Operation
- Operational Configurations
- High Frequency Clock Distribution—CLK or External VCO > 1600 MHz
- Internal VCO and Clock Distribution
- Clock Distribution or External VCO < 1600 MHz
- Phase-Locked Loop (PLL)
- Configuration of the PLL
- Phase Frequency Detector (PFD)
- Charge Pump (CP)
- On-Chip VCO
- PLL External Loop Filter
- PLL Reference Inputs
- Reference Switchover
- Reference Divider R
- VCXO/VCO Feedback Divider N—P, A, B, R
- Digital Lock Detect (DLD)
- Clock Distribution
- Reset Modes
- Power-Down Modes
- Operational Configurations
- Serial Control Port
- Thermal Performance
- Register Map Overview
- Register Map Descriptions
- Applications Information
- Outline Dimensions
Data Sheet AD9516-1
Rev. C | Page 67 of 80
Reg.
Addr.
(Hex) Bits Name Description
0x0A4 [2:0] OUT7 ramp current Ramp current for the delay function. The combination of the number of capacitors and the ramp
current sets the delay full scale.
2 1 0 Current (µA)
0 0 0 200 (default)
0 0 1 400
0 1 0 600
0 1 1 800
1 0 0 1000
1 0 1 1200
1 1 0 1400
1
1
1
1600
0x0A5 [5:0] OUT7 delay fraction Selects the fraction of the full-scale delay desired (6-bit binary).
A setting of 000000 gives zero delay.
Only delay values up to 47 decimals (101111b; 0x2F) are supported (default = 0x00).
0x0A6 0 OUT8 delay bypass Bypasses or uses the delay function.
0: uses delay function.
1: bypasses delay function (default).
0x0A7 [5:3] OUT8 ramp capacitors Selects the number of ramp capacitors used by the delay function. The combination of the
number of capacitors and the ramp current sets the delay full scale.
5 4 3 Number of Capacitors
0 0 0 4 (default)
0 0 1 3
0 1 0 3
0 1 1 2
1
0
0
3
1 0 1 2
1 1 0 2
1 1 1 1
[2:0] OUT8 ramp current Ramp current for the delay function. The combination of the number of capacitors and the ramp
current sets the delay full scale.
2
1
0
Current (µA)
0 0 0 200 (default)
0 0 1 400
0 1 0 600
0 1 1 800
1 0 0 1000
1 0 1 1200
1 1 0 1400
1 1 1 1600
0x0A8 [5:0] OUT8 delay fraction Selects the fraction of the full-scale delay desired (6-bit binary).
A setting of 000000 gives zero delay.
Only delay values up to 47 decimals (101111b; 0x2F) are supported (default = 0x00).