Datasheet

AD9514
Rev. 0 | Page 20 of 28
Table 10. S0—OUT2 Delay
S0 Delay Full Scale
0 Off (Bypassed)
1/3 1.5 ns
2/3 5 ns
1 10 ns
Table 11. S1, S2—Output Select
S1 S2
OUT0
LVPECL
OUT1
LVPECL
OUT2
LVDS/CMOS
0 0 OFF 410 mV OFF
1/3 0 790 mV 790 mV OFF
2/3 0 410 mV 410 mV OFF
1 0 960 mV 960 mV OFF
0 1/3 790 mV 790 mV CMOS
1/3 1/3 410 mV 410 mV LVDS
2/3 1/3 410 mV 410 mV CMOS
1 1/3 790 mV 790 mV LVDS
0 2/3 OFF OFF OFF
1/3 2/3 OFF OFF LVDS
2/3 2/3 OFF OFF CMOS
1 2/3 OFF 790 mV OFF
0 1 410 mV OFF CMOS
1/3 1 790 mV OFF LVDS
2/3 1 410 mV OFF LVDS
1 1 790 mV OFF CMOS
Table 12. S3, S4—OUT2 Delay Fine Adjust or Phase
S0 ≠ 0 S0 = 0
S3 S4
OUT2 Delay Fine Adjust
(Fraction of FS)
OUT2 Phase
0 0 0 0
1/3 0 1/16 1
2/3 0 1/8 2
1 0 3/16 3
0 1/3 1/4 4
1/3 1/3 5/16 5
2/3 1/3 3/8 6
1 1/3 7/16 7
0 2/3 1/2 8
1/3 2/3 9/16 9
2/3 2/3 5/8 10
1 2/3 11/16 11
0 1 3/4 12
1/3 1 13/16 13
2/3 1 7/8 14
1 1 15/16 15