Datasheet

AD9514
Rev. 0 | Page 17 of 28
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–110
–130
–120
–140
–150
–160
05596-015
Figure 17. Additive Phase Noise—LVPECL Divide = 1, 245.76 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–80
–90
–110
–100
–120
–130
–140
–150
–160
05596-016
Figure 18. Additive Phase Noise—LVDS Divide = 1, 245.76 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–100
–110
–120
–130
–140
–150
–160
05596-017
Figure 19. Additive Phase Noise—CMOS Divide = 1, 245.76 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–110
–130
–120
–140
–150
–160
05596-018
Figure 20. Additive Phase Noise—LVPECL Divide = 1, 622.08 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–80
–90
–110
–100
–120
–130
–140
–150
–160
05596-019
Figure 21. Additive Phase Noise—LVDS Divide = 2, 122.88 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–100
–110
–120
–130
–140
–150
–160
05596-020
Figure 22. Additive Phase Noise—CMOS Divide = 4, 61.44 MHz