Datasheet
AD9511
Rev. A | Page 53 of 60
Reg.
Addr.
(Hex)
Bit(s) Name Description
58 <2> Soft SYNC
Soft SYNC bit works the same as the FUNCTION pin when in SYNCB mode, except that this bit’s
polarity is reversed. That is, a high level forces selected outputs into a known state, and a high > low
transition triggers a sync (Default = 0b).
58 <3>
Dist Ref Power-
Down
1 = Power-Down the References for the Distribution Section (Default = 0b).
58 <4>
SYNC Power-
Down
1 = Power-Down the SYNC (Default = 0b).
<6> <5> Function
0 0 RESETB (Default)
0 1 SYNCB
1 0 Test Only; Do Not Use
58 <6:5>
FUNCTION Pin
Select
1 1 PDB
58 <7> Not Used
59 <7:0> Not Used
5A <0> Update Registers
1 written to this bit updates all registers and transfers all serial control port register buffer contents
to the control registers on the next rising SCLK edge. This is a self-clearing bit. 0 does not have to be
written to clear it.
5A <7:1> Not Used.
END