Datasheet

AD9511
Rev. A | Page 45 of 60
REGISTER MAP AND DESCRIPTION
SUMMARY TABLE
Table 23. AD9511 Register Map
Addr
(Hex)
Parameter Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
Bit 0
(LSB)
Def.
Value
(Hex)
Notes
00
Serial
Control Port
Configuration
SDO Inactive
(Bidirectional
Mode)
LSB
First
Soft
Reset
Long
Instruction
Not Used 10
01,
02,
03
Not Used
PLL
PLL Starts
in Power-
Down
04 A Counter Not Used 6-Bit A Counter <5:0> 00
N Divider
(A)
05 B Counter Not Used 13-Bit B Counter Bits 12:8 (MSB) <4:0> 00
N Divider
(B)
06 B Counter 13-Bit B Counter Bits 7:0 (LSB) <7:0> 00
N Divider
(B)
07 PLL 1
Not
Used
LOR Lock_Del
<6:5>
Not Used
LOR
Enable
Not Used 00
08 PLL 2
Not
Used
PFD
Polarity
PLL Mux Select <5:2>
Signal on STATUS pin
CP Mode <1:0> 00
09 PLL 3
Not
Used
CP Current <6:4>
Not
Used
Reset R
Counter
Reset N
Counter
Reset All
Counters
00
0A PLL 4
Not
Used
B
Bypass
Not
Used
Prescaler P <4:2> Power-Down <1:0> 01
N Divider
(P)
0B R Divider Not Used 14-Bit R Divider Bits 13:8 (MSB) <5:0> 00 R Divider
0C R Divider 14-Bit R Divider Bits 13:8 (MSB) <7:0> 00 R Divider
0D PLL 5
Not
Used
Digital
Lock
Det
Enable
Digital
Lock
Det
Window
Not Used
Antibacklash
Pulse Width <1:0>
00
OE-
33
Not Used
FINE DELAY
ADJUST
Fine
Delays
Bypassed
34 Delay Bypass 4 Not Used Bypass 01
Bypass
Delay
35
Delay
Full-Scale 4
Not Used Ramp Capacitor <5:3> Ramp Current <2:0> 00
Max.
Delay
Full-Scale
36
Delay Fine
Adjust 4
Not Used 5-Bit Fine Delay <5:1>
Not
Used
00
Min. Delay
Value
37,
38,
39,
3A,
3B,
3C
Not Used