Datasheet

Data Sheet AD9510
Rev. B | Page 19 of 56
Pin No. Mnemonic Description
28 OUT3B Complementary LVPECL Output.
29 OUT3 LVPECL Output.
34 OUT2B Complementary LVPECL Output.
35 OUT2 LVPECL Output.
38
OUT6B
Complementary LVDS/Inverted CMOS Output. OUT6 includes a delay block.
39 OUT6 LVDS/CMOS Output. OUT6 includes a delay block.
42 OUT5B Complementary LVDS/Inverted CMOS Output. OUT5 includes a delay block.
43 OUT5 LVDS/CMOS Output. OUT5 includes a delay block.
46 OUT4B Complementary LVDS/Inverted CMOS Output.
47 OUT4 LVDS/CMOS Output.
53
OUT1B
Complementary LVPECL Output.
54 OUT1 LVPECL Output.
57 OUT0B Complementary LVPECL Output.
58 OUT0 LVPECL Output.
61 RSET Current Set Resistor to Ground. Nominal value = 4.12 kΩ.
63 CPRSET Charge Pump Current Set Resistor to Ground. Nominal value = 5.1 kΩ.
EPAD
Exposed Paddle. The exposed paddle on this package is an electrical connection as well as a thermal
enhancement. For the device to function properly, the paddle must be attached to ground, GND.