Datasheet

Data Sheet AD9508
Rev. B | Page 5 of 40
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
CMOS CLOCK OUTPUTS Single-ended; termination = open; OUTx
and
OUTx
in phase
Output Frequency 250 MHz With 10 pF load per output, see Figure 14
for swing vs. frequency
Output Voltage
At 1 mA Load
High V
OH
1.7 V
Low V
OL
0.1 V
At 10 mA load
High V
OH
1.2 V
Low V
OL
0.6 V
At 10 mA Load (2 × CMOS Mode)
High V
OH
1.45 V
Low V
OL
0.35 V
CMOS Duty Cycle 45 55 % Up to 250 MHz
OUTPUT DRIVER TIMING CHARACTERISTICS
Table 3.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
LVDS OUTPUTS Termination = 100 Ω differential, 1 × LVDS
Output Rise/Fall Time t
R
, t
F
152 177 ps 20% to 80% measured differentially
Propagation Delay, Clock-to-LVDS Output t
PD
1.56 2.01 2.43 ns
Temperature Coefficient 2.8 ps/°C
Output Skew
1
All LVDS Outputs
On the Same Part 48 ps
Across Multiple Parts 781 ps
Assumes same temperature and supply;
takes into account worst-case propaga-
tion delay delta due to worst-case
process variation
HSTL OUTPUTS
Termination = 100 Ω differential, 1 × HSTL
Output Rise/Fall Time t
R
, t
F
118 143 ps 20% to 80% measured differentially
Propagation Delay, Clock-to-HSTL Output t
PD
1.59 2.05 2.5 ns
Temperature Coefficient 2.9 ps/°C
Output Skew
1
All HSTL Outputs
On the Same Part 59 ps
Across Multiple Parts 825 ps
Assumes same temperature and supply;
takes into account worst-case propaga-
tion delay delta due to worst-case
process variation
CMOS OUTPUTS
Output Rise/Fall Time t
R,
t
F
1.18 1.45 ns 20% to 80%; C
LOAD
= 10 pF
Propagation Delay, Clock-to-CMOS Output t
PD
2.04 2.56 3.07 ns 10 pF load
Temperature Coefficient
3.3
ps/°C
Output Skew
1
All CMOS Outputs
On the Same Part 112 ps
Across Multiple Parts 965 ps
Assumes same temperature and supply;
takes into account worst-case
propagation delay delta due to worst-
case process variation