Datasheet

Data Sheet AD9508
Rev. B | Page 33 of 40
REGISTER MAP BIT DESCRIPTIONS
SERIAL PORT CONFIGURATION (REGISTER 0x00)
Table 24. Serial Configuration
Address Bits Bit Name Description
0x00
7 SDO enable Enables SPI port SDO pin. This bit does nothing in I²C mode.
1 = 4-wire (SDO pin enabled).
0 = 3-wire (default).
6 LSB first/increment address Bit order for the SPI port. This bit is nonfunctional in I²C mode.
1 = LSB and byte first. Register addresses are automatically incremented in multibyte
transfers.
0 = MSB and byte first (default). Register addresses are automatically decremented in
multibyte transfers.
5 Soft reset Device reset.
[4:3] Reserved Reserved.
2 Soft reset Same function as Bit 5 of this register, set Bit 2 and Bit 5 to the same value.
1 LSB first/increment address Same function as Bit 6 of this register, set Bit 1 and Bit 6 to the same value.
0 SDO enable Same function as Bit 7 of this register, set Bit 7 and Bit 0 to the same value.
SILICON REVISION (REGISTER 0x0A TO REGISTER 0x0D)
Table 25. Silicon Revision
Address Bits Bit Name Description
0x0A
[7:0] Silicon Revision[7:0] A read-only register. Identifies the revision level of the AD9508.
0x0B
[7:0]
Reserved
0x00 = default.
0x0C [7:0] Clock Part Family ID[7:0]
A read-only register. This register, together with Register 0x000D, uniquely identifies an
AD9508. No other device in the Analog Devices, Inc., AD95xx family has a value of 0x0005 in
these two registers.
0x05 = default.
0x0D
[7:0] Clock Part Family ID[15:8] This register is a continuation of Register 0x000C.
0x00 = default.
CHIP LEVEL FUNCTIONS (REGISTER 0x12 TO REGISTER 0x14)
Table 26. Sleep and Synchronization
Address Bits Bit Name Description
0x12
[7:0] Reserved 0x00000010 = default
0x13
[7:5] Reserved 0x000 = default
4 Sleep 0 = disables sleep mode (default)
1 = enables sleep mode
[3:0] Reserved 0x0000 = default
0x14
[7:1] Reserved 0x0000000 = default
0 SYNC_BAR 0 = enables a software output synchronization routine
1 = output synchronization via software disabled (default)