Datasheet

Data Sheet AD9508
Rev. B | Page 19 of 40
TEST CIRCUITS
INPUT/OUTPUT TERMINATION RECOMMENDATIONS
Figure 34. Typical AC-Coupled or DC-Coupled LVDS or HSTL Configurations
Figure 35. Typical AC-Coupled or DC-Coupled CML Configurations
Figure 36. Typical AC-Coupled or DC-Coupled LVPECL Configurations
Figure 37. Typical 1.8 V CMOS Configurations for Short Trace Lengths
Figure 38. AC-Coupled LVDS or HSTL Output Driver (100 Ω Resistor Can Go
on Either Side of Decoupling Capacitors Placed As Close As Possible To The
Destination Receiver)
Figure 39. DC-Coupled LVDS or HSTL Output Driver
Figure 40. Interfacing the HSTL Driver to a 3.3 V LVPECL Input (This method
incorporates impedance matching and dc biasing for bipolar LVPECL
receivers. If the receiver is self-biased, the termination scheme shown in
Figure 38 is recommended.)
100Ω
CLK
CLK
100Ω
CLK
CLK
11161-132
AD9508
AD9508
CLK
CLK
CLK
CLK
V
CC
V
CC
11161-133
AD9508
AD9508
CLK
CLK
50Ω 50Ω
V
CC
– 2V
CLK
CLK
50Ω 50Ω
AD9508
AD9508
V
CC
– 2V
11161-134
CLK
CLK
AD9508
11161-135
11161-136
DOWNSTREAM
DEVICE
WITH HIGH
IMPEDANCE
INPUT AND
INTERNAL
DC-BIAS
0
.1µ
F
0.1µF
100Ω
A
D9508
HSTL OR
LVDS
11161-137
AD9508
HSTL OR
LVDS
Z
0
= 50Ω
Z
0
= 50Ω
SINGLE-ENDED
(NOT COUPLED)
LVDS OR 1.8V HSTL
HIGH-IMPEDANCE
DIFFERENTIAL
RECEIVER
100Ω
11161-138
3.3V
LVPECL
0.1µF
0.1µF
AD9508
1.8V
HSTL
Z
0
= 50Ω
Z
0
= 50Ω
SINGLE-ENDED
(NOT COUPLED)
82Ω
V
S
= 3.3V
82Ω
127Ω127Ω