Datasheet

AD9508 Data Sheet
Rev. B | Page 14 of 40
Figure 9. LVDS Propagation Delay vs. Input Common-Mode Voltage
Figure 10. LVDS Output Duty Cycle vs. Output Frequency
Figure 11. CMOS Output Waveform at 200 MHz with 10 pF Load
Figure 12. CMOS Output Waveform at 50 MHz with 10 pF Load
Figure 13. Power Supply Current vs. Input Frequency vs. Number of Outputs
Used, CMOS
Figure 14. CMOS Output Swing vs. Frequency and Resistive Load
COMMON-MODE VOLTAGE (mV)
PROPAGATION DELAY (ns)
2.0
1.8
1.6
1.4
2.6
2.4
2.2
300 500 700 900 1100 1300 1500
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55
FREQUENCY (MHz)
4002000
600 800
1000
1200 1400
1600
DUTY CYCLE (%)
60
50
45
40
DIVIDER 1
DIVIDER 2 (FREQUENCY RANGE NORMALIZED FROM 0Hz TO 800MHz)
DIVIDER 3 (FREQUENCY RANGE NORMALIZED FROM 0Hz TO 500MHz)
11161-011
TIME (1.25ns/DIV)
VOLTAGE (300mV/DIV)
11161-012
TIME (5ns/DIV)
VOLTAGE (300mV/DIV)
11161-013
CURRENT (mA)
25 50 75 100 125
25
50
75
100
125
150 175 200 225 250
FREQUENCY (MHz)
ONE OUTPUT (mA)
TWO OUTPUTS (mA)
THREE OUTPUTS (mA)
FOUR OUTPUTS (mA)
FIVE OUTPUTS (mA)
SIX OUTPUTS (mA)
SEVEN OUTPUTS (mA)
EIGHT OUTPUTS (mA)
11161-014
0
1.4
1.5
1.6
1.7
1.8
1.9
50 100 150 200 250
OUTPUT SWING (V p-p)
FREQUENCY (MHz)
300Ω LOAD
500Ω LOAD
750Ω LOAD
1kΩ LOAD
11161-015