Datasheet

AD9481
Rev. 0 | Page 14 of 28
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
2.0
–40–200 20406080
05045-016
TEMPERATURE (°C)
GAIN ERROR (%)
FS = 1V
EXTERNAL REFERENCE
FS = 1V
INTERNAL REFERENCE
Figure 16. Full-Scale Gain Error vs. Temperature,
A
IN
= 70.3 MHz @ −0.5 dBFS, 250 MSPS
40
70
65
60
55
50
45
–40–200 20406080
05045-017
TEMPERATURE (°C)
(dB)
SFDR
SINAD
Figure 17. SINAD, SFDR vs. Temperature,
A
IN
= 70 MHz @ −1 dBFS, 250 MSPS
–0.15
–0.10
–0.05
0
0.05
0.10
2.7 3.63.53.43.33.23.13.02.92.8
05045-018
AVDD (V)
CHANGE IN VREF (%)
Figure 18. VREF Sensitivity to AVDD
45
50
55
60
65
70
3.0 3.1 3.2 3.3 3.4
SFDR
SNR
3.5 3.6
05045-019
AVDD (V)
(dB)
SINAD
Figure 19. SNR, SINAD, and SFDR vs. Supply Voltage,
A
IN
= 70.3 MHz @ −1 dBFS, 250 MSPS
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
0.5
0 50 100 150 200 250
05045-020
CODE
LSB
Figure 20. Typical DNL Plot,
A
IN
= 10.3 MHz @ −0.5 dBFS, 250 MSPS
–0.50
–0.25
0
0.25
0.50
0 50 100 150 200 250
05045-021
CODE
LSB
Figure 21. Typical INL Plot,
A
IN
= 10.3 MHz @ −0.5 dBFS, 250 MSPS