Datasheet

AD9444
Rev. 0 | Page 5 of 40
DIGITAL SPECIFICATIONS
AVDD1 = 3.3 V, AVDD2 = 5.0 V, DRVDD = 3.3 V, R
LVD SB IAS
= 3.74 kΩ, unless otherwise noted.
Table 3.
AD9444BSVZ-80
Parameter Temp Test Level
Min Typ Max
Unit
CMOS LOGIC INPUTS (DFS, DCS MODE, OUTPUT MODE)
High Level Input Voltage Full IV 2.0 V
Low Level Input Voltage Full IV 0.8 V
High Level Input Current Full VI +200 µA
Low Level Input Current Full VI −10 +10 µA
Input Capacitance Full V 2 pF
DIGITAL OUTPUT BITS—CMOS Mode (D0 to D13, OTR)
1
DRVDD = 3.3 V
High Level Output Voltage Full IV 3.25 V
Low Level Output Voltage Full IV 0.2 V
DIGITAL OUTPUT BITS LVDS Mode (D0 to D13, OTR)
V
OD
Differential Output Voltage
2
Full VI 247 545 mV
V
OS
Output Offset Voltage Full VI 1.125 1.375 V
CLOCK INPUTS (CLK+, CLK−)
Differential Input Voltage Full IV 0.2 V
Common-Mode Voltage Full VI 1.3 1.5 1.6 V
Differential Input Resistance Full V 8 10 12 kΩ
Differential Input Capacitance Full V 4 pF
1
Output voltage levels measured with 5 pF load on each output.
2
LVDS R
TERM
= 100 Ω.