Datasheet

AD9444
Rev. 0 | Page 34 of 40
P1
P3
P5
P7
P9
P11
P13
P15
P17
P19
P21
P23
P25
P27
P29
P31
P33
P35
P37
P39
P2
P4
P6
P8
P10
P12
P14
P16
P18
P20
P22
P24
P26
P28
P30
P32
P34
P36
P38
P40
P3
C40MS
GND
PWR
U4
74VCX86
+
RSO16ISO
220
R8
R7
R6
R5
R4
R3
R1
R2
8
7
6
5
4
3
1
2
16
15
14
13
12
11
10
9
RZ4
8
7
6
5
4
3
1
2
16
15
14
13
12
11
10
9
RZ5
7
14
11
8
6
3
U10
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
D13M
D11M
D9M
D7M
D6M
D5M
D2M
D1M
D0M
D3M
D4M
D8M
D10M
D12M
ORM
DRM
D0M
D1M
D3M
D4M
D5M
D6M
D2M
GND GND
GND
GND
D7M
D8M
D9M
D10M
D11M
D12M
D13M
ORM
E30
E32
E31
VDL
GND
U5
SN74LVCH16373A
R8
R7
R6
R5
R4
R3
R1
R2
4Y
3Y
2Y
1Y
1
2
4
5
9
10
12
13
1A
1B
2A
2B
3A
3B
4A
4B
C66
10µF
C25
0.1µF
C41
0.1µF
C24
0.1µF
VDL
GND
GND
00
R16
XORZIN
GATE2
00
R42
GND
VDL
DRM
05089-056
RSO16ISO
220
R8
R7
R6
R5
R4
R3
R1
R2
RSO16ISO
8
7
6
5
4
3
1
2
16
15
14
13
12
11
10
9
RZ4
8
7
6
5
4
3
1
2
16
15
14
13
12
11
10
9
RZ1
R8
R7
R6
R5
R4
R3
R1
R2
220RZ2
D7T/D0Y
D8C/D1Y
D8T/D2Y
D9C/D3Y
D9T/D4Y
D10C/D5Y
D10T/D6Y
D11C/D7Y
D11T/D8Y
D12C/D9Y
D12T/D10Y
D13C/D11Y
D13T/D12Y
DORC/D13Y
DORT/DORY
XOR2IN
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
45
39
34
28
48
25
42
31
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
4
10
15
21
7
18
1
24
1D1
1D2
1D3
1D4
1D5
1D6
1D7
1D8
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
1Q8
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2D8
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
2Q8
GND
LE1
LE2
VCC
OE1
OE2
VCC
VCC
VCC
GND
GND
GND GND
GND
GND
GND
Q = OUTPUT
D = INPUT
GND
VDL
GND
GND
GND
XOR2IN
VDL
GND
GND
VDL
GND
GND
VDL
GND
GND
RSO16ISO
220RZ5
00
R14
DRM
00
R41
GATE
C68
0.1µF
C67
0.1µF
63
0.01µF
E45
E49
E42
VDL
GND
00
R50
NOT PLACED
COUTB
COUT
Figure 61. CMOS Mode Evaluation Board Schematic (Continued)