Datasheet

AD9430
Rev. E | Page 11 of 44
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
PIN 1
AD9430
CMOS PINOUT
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 27 28
29 30 31
32
33 34 35
36
37 38 39
40
41 42 43 44 45 46 47 48 49 50
767778798081828384858687888990919293949596979899100
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
02607-004
AGND
AVDD AVDD AVDD
AGND AGND
DS+
DS–
AVDD
AGND
CLK+
CLK–
AGND
AVDD AVDD
AGND
DNC DNC
DB0 DB1 DB2
DRVDD
DRGND
DB3 DB4
DRVDD
DRGND
DA4
DA3
DA2
DA1
DA0
DNC
DRGND
DNC
DNC
DCO+
DCO–
DRVDD
DRGND
OR_B
DB11
DB10
DB9
DB8
DB7
DRVDD
DRGND
DB6
DB5
DA9 DA8 DA7 DA6 DA5 AGND AVDD AVDD AGND AGND AVDD AVDD AGND AGND AGND AVDD AVDD AVDD AGND AGND OR_A DA11 DRVDD DRGND DA10
S5
DNC
S4
AGND
S2
S1
DNC
AVDD
AGND
S
ENSE
VREF
AGND
AGND
AVDD
AVDD
AGND
AGND
AVDD
AVDD
AGND
VIN+
VIN–
AGND
AVDD
AGND
NOTES
1. THE AD9430 HAS A CONDUCTIVE HEAT SLUG TO HELP DISSIPATE HEAT AND ENSURE RELIABLE OPERATION OF
THE DEVICE OVER THE FULL INDUSTRIAL TEMPERATURE RANGE. THE SLUG IS EXPOSED ON THE BOTTOM OF
THE PACKAGE AND ELECTRICALLY CONNECTED TO CHIP GROUND. IT IS RECOMMENDED THAT NO PCB SIGNAL
TRACES OR VIAS BE LOCATED UNDER THE PACKAGE THAT COULD COME IN CONTACT WITH THE CONDUCTIVE
SLUG. ATTACHING THE SLUG TO A GROUND PLANE WILL REDUCE THE JUNCTION TEMPERATURE OF THE
DEVICE WHICH MAY BE BENEFICIAL IN HIGH TEMPERATURE ENVIRONMENTS.
Figure 4. CMOS Dual-Mode Pin Configuration
Table 7. CMOS Mode Pin Function Descriptions
Pin Number Mnemonic Description
1 S5
Full-Scale Adjust Pin. AVDD sets f
S
= 0.768 V p-p differential,
GND sets f
S
= 1.536 V p-p differential.
2, 7, 42, 43, 65, 66, 68 DNC Do Not Connect.
3 S4 Interleaved, Parallel Select Pin. High = interleaved.
4, 9, 12, 13, 16, 17, 20, 23, 25, 26, 30, 31, 35, 38, 41, 86,
87, 91, 92, 93, 96, 97, 100
AGND
1
Analog Ground.
5 S2 Output Mode Select. Low = dual-port CMOS, high = LVDS.
6 S1
Data Format Select. Low = binary, high = twos complement for
both CMOS and LVDS modes.
8, 14, 15, 18, 19, 24, 27, 28, 29, 34, 39, 40, 88, 89, 90, 94,
95, 98, 99
AVDD 3.3 V Analog Supply.
10 SENSE Reference Mode Select Pin. Float for internal reference operation.
11 VREF 1.235 V Reference I/O—Function Dependent on SENSE.
21 VIN+ Analog Input—True.
22 VIN– Analog Input—Complement.
32 DS+ Data Sync (Input)—True. Tie low if not used.
33 DS–
2
Data Sync (Input)—Complement. Tie high if not used.