Datasheet
AD9398
Rev. 0 | Page 6 of 44
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
05678-002
V
DD
RED 0
RED 1
RED 2
RED 3
RED 4
RED 5
RED 6
RED 7
GND
V
DD
DATACK
DE
HSOUT
NC
VSOUT
O/E FIELD
SDA
SCL
PWRDN
V
D
NC
GND
NC
V
D
26
I
2
S1
27
I
2
S0
28
S/PDIF
29
GND
30
DV
DD
31
GND
32
DV
DD
33
V
D
34
Rx0–
35
Rx0+
36
GND
37
Rx1–
38
Rx1+
39
GND
2
GREEN 7
3
GREEN 6
4
GREEN 5
7
GREEN 2
6
GREEN 3
5
GREEN 4
1
GND
8
GREEN 1
9
GREEN 0
10
V
DD
12
BLUE 7
13
BLUE 6
14
BLUE 5
15
BLUE 4
16
BLUE 3
17
BLUE 2
18
BLUE 1
19
BLUE 0
20
MCLKIN
21
MCLKOUT
22
SCLK
23
LRCLK
24
I
2
S3
25
I
2
S2
11
GND
74
NC
GND
73
NC
72
V
D
69
GND
70
NC
71
NC
75
68
NC
67
V
D
66
NC
64
GND
63
GND
62
GND
61
GND
60
GND
59
PV
DD
58
GND
57
FILT
56
PV
DD
55
GND
54
PV
DD
53
GND
52
MDA
51
MCL
65
GND
40
Rx2–
41
Rx2+
42
GND
43
RxC+
44
RxC–
45
V
D
46
RTERM
47
GND
48
DV
DD
49
DDCSCL
50
DDCSDA
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
PIN 1
AD9398
TOP VIEW
(Not to Scale)
NC = NO CONNECT
Figure 2. Pin Configuration
Table 5. Complete Pinout List
Pin Type Pin No. Mnemonic Function Value
INPUTS 81 PWRDN Power-Down Control 3.3 V CMOS
DIGITAL VIDEO DATA INPUTS 35 Rx0+ Digital Input Channel 0 True TMDS
34 Rx0− Digital Input Channel 0 Complement TMDS
38 Rx1+ Digital Input Channel 1 True TMDS
37 Rx1− Digital Input Channel 1 Complement TMDS
41 Rx2+ Digital Input Channel 2 True TMDS
40 Rx2− Digital Input Channel 2 Complement TMDS
DIGITAL VIDEO CLOCK INPUTS 43 RxC+ Digital Data Clock True TMDS
44 RxC− Digital Data Clock Complement TMDS
OUTPUTS 92 to 99 RED [7:0] Outputs of Red Converter, Bit 7 is MSB V
DD
2 to 9 GREEN [7:0] Outputs of Green Converter, Bit 7 is MSB V
DD
12 to 19 BLUE [7:0] Outputs of Blue Converter, Bit 7 is MSB V
DD
89 DATACK Data Output Clock V
DD
87 HSOUT HSYNC Output Clock (Phase-Aligned with DATACK) V
DD
85 VSOUT VSYNC Output Clock (Phase-Aligned with DATACK) V
DD
84 FIELD Odd/Even Field Output V
DD
REFERENCES 57 FILT
Connection for External Filter Components For audio
PLL
PV
DD