Datasheet

AD9393
Rev. 0 | Page 25 of 40
0x30—Bit[5], HDMI HSYNC Polarity
This read-only bit indicates the polarity of the HDMI HSYNC.
0 = HDMI HSYNC polarity is active low. 1 = HDMI HSYNC
polarity is active high.
0x30—Bit[4], HDMI VSYNC Polarity
This read-only bit indicates the polarity of the HDMI VSYNC.
0 = HDMI VSYNC polarity is low active. 1 = HDMI VSYNC
polarity is high active.
0x30—Bits[3:0], HDMI Pixel Repetition
These read-only bits indicate the pixel repetition on HDMI.
0 = 1×, 1 = 2×, 2 = 3×, with a maximum repetition of 10× (0x9).
See Tabl e 14.
Table 14.
Select Repetition Multiplier
0000 1×
0001 2×
0010 3×
0011 4×
0100 5×
0101 6×
0110 7×
0111 8×
1000 9×
1001 10×
0x34—Bit[5:4], Audio Setup
This bit must be written to 0b11 for proper audio operation.
0x34—Bit[3], Up Conversion Mode
0 = repeat Cb and Cr values. 1 = interpolate Cb and Cr values.
0x34—Bit[2], CrCb Filter Enable
Enables the FIR filter for 4:2:2 CrCb output.
COLOR SPACE CONVERSION
The default power up values for the color space converter
coefficients (Register 0x34 through Register 0x4C) are set
for ATSC RGB-to-YCrCb conversion. They are completely
programmable for other conversions.
0x34—Bit[1], CSC_ENABLE
This bit enables the color space converter. 0 = disable color
space converter. 1 = enable color space converter. The power-
up default setting is 0.
0x35—Bits[6:5], CSC_MODE
These two bits set the fixed-point position of the CSC
coefficients, including the A4, B4, and C4 offsets.
Table 15. CSC Fixed Point Converter Mode
Select Result
00 ±1.0, −4096 to +4095
01 ±2.0, −8192 to +8190
1x ±4.0, −16,384 to +16,380
0x35—Bits[4:0], CSC_COEFF_A1 MSB and 0x36—
Bits[7:0], CSC_COEFF_A1 LSB
Register 0x35[4:0] form the five MSBs of the Color Space
Conversion Coefficient A1. These bits, combined with the
eight LSBs of Register 0x36 form a 13-bit, twos complement
coefficient, which is user programmable. The equation takes
the form of:
R
OUT
= (A1 × R
IN
) + (A2 × G
IN
) + (A3 × B
IN
) + A4
G
OUT
= (B1 × R
IN
) + (B2 × G
IN
) + (B3 × B
IN
) + B4
B
OUT
= (C1 × R
IN
) + (C2 × G
IN
) + (C3 × B
IN
) + C4
The default value for the 13-bit A1 coefficient is 0x0C52.
0x37—Bits[4:0], CSC_COEFF_A2 MSB and 0x38—
Bits[7:0], CSC _COEFF_A2 LSB
Register 0x37[4:0] form the five MSBs of the Color Space
Conversion Coefficient A2. Combined with the eight LSBs of
Register 0x38, these bits form a 13-bit, twos complement
coefficient that is user programmable. The equation takes
the form of:
R
OUT
= (A1 × R
IN
) + (A2 × G
IN
) + (A3 × B
IN
) + A4
G
OUT
= (B1 × R
IN
) + (B2 × G
IN
) + (B3 × B
IN
) + B4
B
OUT
= (C1 × R
IN
) + (C2 × G
IN
) + (C3 × B
IN
) + C4
The default value for the 13-bit A2 coefficient is 0x0800.