Datasheet

AD9280
–11–
The actual reference voltages used by the internal circuitry of
the AD9280 appear on REFTF and REFBF. For proper opera-
tion, it is necessary to add a capacitor network to decouple these
pins. The REFTF and REFBF should be decoupled for all
internal and external configurations as shown in Figure 17.
AD9280
REFTF
REFBF
0.1mF
0.1mF
10mF
0.1mF
Figure 17. Reference Decoupling Network
Note: REFTF = reference top, force
REFBF = reference bottom, force
REFTS = reference top, sense
REFBS = reference bottom, sense
INTERNAL REFERENCE OPERATION
Figures 18, 19 and 20 show sample connections of the AD9280
internal reference in its most common configurations. (Figures
18 and 19 illustrate top/bottom mode while Figure 20 illustrates
center span mode). Figure 29 shows how to connect the AD9280
for 1 V p-p differential operation. Shorting the VREF pin
directly to the REFSENSE pin places the internal reference
amplifier, A1, in unity-gain mode and the resultant reference
output is 1 V. In Figure 18 REFBS is grounded to give an input
range from 0 V to 1 V. These modes can be chosen when the
supply is either +3 V or +5 V. The VREF pin must be bypassed to
AVSS (analog ground) with a 1.0 µF tantalum capacitor in
parallel with a low inductance, low ESR, 0.1 µF ceramic capacitor.
1V
0V
MODE
AVDD
10kV
10kV
10kV
A/D
CORE
4.2kV
TOTAL
REFTS
REFBS
10
mF
0.1mF
REFTF
REFBF
0.1mF
AIN
0.1mF
AD9280
10kV
REF
SENSE
VREF
1V
A2
SHA
A1
0.1mF1.0mF
Figure 18. Internal Reference—1 V p-p Input Span
(Top/Bottom Mode)
Figure 19 shows the single-ended configuration for 2 V p-p
operation. REFSENSE is connected to GND, resulting in a 2 V
reference output.
2V
0V
MODE
AVDD
10kV
10kV
10kV
A/D
CORE
4.2kV
TOTAL
REFTS
REFBS
10
mF
0.1
mF
REFTF
REFBF
0.1mF
AIN
0.1mF
AD9280
10kV
REF
SENSE
VREF
A1
1V
SHA
A2
0.1mF1.0mF
Figure 19. Internal Reference, 2 V p-p Input Span
(Top/Bottom Mode)
Figure 20 shows the single-ended configuration that gives the
good high frequency dynamic performance (SINAD, SFDR).
To optimize dynamic performance, center the common-mode
voltage of the analog input at approximately 1.5 V. Connect the
shorted REFTS and REFBS inputs to a low impedance 1.5 V
source. In this configuration, the MODE pin is driven to a volt-
age at midsupply (AVDD/2).
Maximum reference drive is 1 mA. An external buffer is re-
quired for heavier loads.
AVDD/2
+1.5V
2V
1V
MODE
10kV
10kV
10kV
A/D
CORE
4.2kV
TOTAL
REFTS
REFBS
10mF
0.1
mF
REFTF
REFBF
0.1mF
AIN
0.1mF
AD9280
10kV
REF
SENSE
VREF
1V
SHA
A2
A1
0.1
mF1.0mF
Figure 20. Internal Reference 1 V p-p Input Span
(Center Span Mode)
REV. E