Datasheet

AD9279
Rev. 0 | Page 5 of 44
Parameter
1
Test Conditions/Comments Min Typ Max Unit
Input-Referred Noise Voltage R
S
= 0 Ω, R
FB
= ∞
LNA gain = 15.6 dB 1.5 nV/√Hz
LNA gain = 17.9 dB 1.4 nV/√Hz
LNA gain = 21.3 dB 1.3 nV/√Hz
Noise Figure R
S
= 50 Ω, R
FB
= ∞
LNA gain = 15.6 dB 5.7 dB
LNA gain = 17.9 dB 5.3 dB
LNA gain = 21.3 dB 4.8 dB
Input-Referred Dynamic Range R
S
= 0 Ω, R
FB
= ∞
LNA gain = 15.6 dB 164 dBFS/√Hz
LNA gain = 17.9 dB 162 dBFS/√Hz
LNA gain = 21.3 dB 160 dBFS/√Hz
Output-Referred SNR
−3 dBFS input, f
RF
= 2.5 MHz, f
4LO
=
10 MHz, 1 kHz offset
155 dBc/√Hz
Two-Tone Intermodulation (IMD3)
f
RF1
= 5.015 MHz, f
RF2
= 5.020 MHz,
f
4LO
= 20 MHz, A
RF1
= −1 dBFS, A
RF2
=
−21 dBFS, IMD3 relative to A
RF2
−58 dB
Quadrature Phase Error
I to Q, all phases, 1 σ
0.15 Degrees
I/Q Amplitude Imbalance
I to Q, all phases, 1 σ
0.015 dB
Channel-to-Channel Matching
Phase I to I, Q to Q, 1 σ
0.5 Degrees
Amplitude I to I, Q to Q, 1 σ
0.25 dB
POWER SUPPLY, MODE I/II/III
AVDD1 1.7 1.8 1.9 V
AVDD2
3
2.7 3.0 3.6 V
DRVDD 1.7 1.8 1.9 V
I
AVDD1
TGC mode 197/270/328 mA
CW Doppler mode 32 mA
I
AVDD2
TGC mode, no signal 240 mA
CW Doppler mode 144 mA
I
DRVDD
ANSI-644 mode 49/51/52 mA
Low power (IEEE 1596.3 similar) mode 33/35/36
Total Power Dissipation
(Including Output Drivers)
TGC mode, no signal 1134/1269/
1375
1275/1410/
1594
mW
CW Doppler mode 495 mW
Power-Down Dissipation 5 mW
Standby Power Dissipation 542 mW
Power Supply Rejection Ratio
(PSRR)
1.6 mV/V
ADC RESOLUTION 12 Bits
ADC REFERENCE
Output Voltage Error VREF = 1 V ±50 mV
Load Regulation at 1.0 mA VREF = 1 V 2 mV
Input Resistance 6 kΩ
1
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and information about how these tests were completed.
2
The overrange condition is specified as 6 dB more than the full-scale input range.
3
When the LNA gain is set to 15.6 dB, AVDD2 >3.0 V.