Datasheet

AD9277
Rev. 0 | Page 22 of 48
POST
AMP
LNA
GAIN–
GAIN+
SERIAL
LVDS
AAF
X-AMP VGA
ATTENUATOR
–42dB TO 0dB
GAIN
INTERPOLATOR
PIPELINE
ADC
LOSW-x
LO-x
LI-x
LG-x
RESET
4LO+
4LO–
R
FB2
LO
GENERATION
4
15.6dB,
17.9dB,
21.3dB
21dB,
24dB,
27dB,
30dB
CWI+
CWI–
CWQ+
CWQ–
DOUTx+
DOUTx–
R
FB1
C
LG
C
SH
TRANSDUCE
R
C
S
T/R
SWITCH
08181-040
Figure 46. Simplified Block Diagram of a Single Channel
CHANNEL OVERVIEW
Each channel contains both a TGC signal path and a CW Doppler
signal path. Common to both signal paths, the LNA provides user-
adjustable input impedance termination. The CW Doppler path
includes an I/Q demodulator. The TGC path includes a differen-
tial X-AMP® VGA, an antialiasing filter, and an ADC. Figure 46
shows a simplified block diagram with external components.
The signal path is fully differential throughout to maximize signal
swing and reduce even-order distortion; however, the LNA is
designed to be driven from a single-ended signal source.
Low Noise Amplifier (LNA)
Good noise performance relies on a proprietary ultralow noise
LNA at the beginning of the signal chain, which minimizes the
noise contribution in the following VGA. Active impedance
control optimizes noise performance for applications that
benefit from input impedance matching.
A simplified schematic of the LNA is shown in Figure 47. LI-x
is capacitively coupled to the source. An on-chip bias generator
establishes dc input bias voltages of around 0.9 V and centers the
output common-mode levels at 1.5 V (AVDD2 divided by 2). A
capacitor, C
LG
, of the same value as the input coupling capacitor,
C
S
, is connected from the LG-x pin to ground.
It is highly recommended that the LG-x pins form a Kelvin type
connection to the input or probe connection ground. Simply
connecting the LG-x pin to ground near the device can allow
differences in potential to be amplified through the LNA. This
generally shows up as a dc offset voltage that can vary from
channel to channel and part to part, depending on the appli-
cation and the layout of the PCB.
C
SH
TRANSDUCER
C
S
C
LG
LI-x
V
CM
R
FB2
R
FB1
C
FB
V
O
+
V
O
–
T/R
SWITCH
V
CM
LG-x
LOSW-x
LO-x
08181-041
Figure 47. Simplified LNA Schematic
The LNA supports differential output voltages as high as 4.4 V p-p
with positive and negative excursions of ±1.1 V from a common-
mode voltage of 1.5 V. The LNA differential gain sets the maximum
input signal before saturation. One of three gains is set through the
SPI. The corresponding full-scale input for the gain settings of
15.6 dB, 17.9 dB, and 21.3 dB is 733 mV p-p, 550 mV p-p, and
367 mV p-p, respectively. Overload protection ensures quick
recovery time from large input voltages. Because the inputs are
capacitively coupled to a bias voltage near midsupply, very large
inputs can be handled without interacting with the ESD
protection.