Datasheet

AD9271
Rev. B | Page 9 of 60
ADC TIMING DIAGRAMS
DCO–
DCO+
DOUTx–
FCO–
FCO+
AIN
CLK–
CLK+
MSB D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D10MSB
DOUTx+
N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 9 N – 8N – 8
06304-00
N – 1
N
t
DATA
t
FRAME
t
FCO
t
PD
t
EH
t
A
2
t
CPD
t
EL
Figure 2. 12-Bit Data Serial Stream (Default)
DCO–
DCO+
DOUTx–
DOUTx+
FCO–
FCO+
AIN
CLK–
CLK+
LSB
N – 9
D0
N – 9
D1
N – 9
D2
N – 9
D3
N – 9
D4
N – 9
D5
N – 9
D6
N – 9
D7
N – 9
D8
N – 9
D9
N – 9
D10
N – 9
D0
N – 8
LSB
N – 8
N – 1
t
A
N
t
DATA
t
FRAME
t
FCO
t
PD
t
EH
06304-004
t
CPD
t
EL
Figure 3. 12-Bit Data Serial Stream, LSB First