Datasheet

AD9271
Rev. B | Page 6 of 60
AD9271-25 AD9271-40 AD9271-50
Parameter
1
Conditions Min Typ Max Min Typ Max Min Typ Max Unit
POWER SUPPLY
AVDD 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V
DRVDD 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V
CWVDD 3.0 3.3 3.6 3.0 3.3 3.6 3.0 3.3 3.6
I
AVDD
Full-channel mode 505 613 742 mA
CW Doppler mode
with four channels
enabled
136 160 170 mA
I
DRVDD
46.7 48.7 50 mA
Total Power
Dissipation
(Including Output
Drivers)
Full-channel mode,
no signal
993 1063 1190 1280 1425 1494 mW
CW Doppler mode
with four channels
enabled
192 216 224 mW
Power-Down
Dissipation
4.5 4.5 4.5 mW
Standby Power
Dissipation
101.7 112.5 120.6 mW
Power Supply
Rejection Ratio
(PSRR)
1 1 1 mV/V
ADC RESOLUTION 12 12 12 Bits
ADC REFERENCE
Output Voltage Error
(VREF = 1 V)
±20 ±20 ±20 mV
Load Regulation @
1.0 mA
(VREF = 1 V)
3 3 3 mV
Input Resistance 6 6 6 kΩ
1
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed.
2
SE = single ended.
3
The overrange condition is specified as being 6 dB more than the full-scale input range.