Datasheet

AD9260
Rev. C | Page 39 of 44
TP7 TP9 TP11 TP12 TP13
P1 17 P1 19 P1 21 P1 23 P1 25 P1 27 P1 29 P1 31
P1 33 P1 38
P1 39 P1 37 P1 35 P1 2 P1 4 P1 6 P1 8 P1 10 P1 12 P1 14 P1 16 P1 18 P1 20 P1 22 P1 24 P1 26 P1 28 P1 30 P1 32 P1 34 P1 38 P1 40
P1 1 P1 3 P1 5 P1 7 P1 9 P1 11 P1 13 P1 15
20
10 18 17 16 15 14
1
19
2 3 4 5 6 7 8 9
20 19 18 17 16
1 2 3 4 5 6 7 8 9
10
15 14 13 12 11 20 19 18 17 16
1 2 3 4 5 6 7 8 9
10
15 14 13 12 11
22 21 20 19 18
34
35 36 37 38 39 40 41 42
17 16 15 14 13 12
12 3 456 78 91 01 1
33 32 31 30 29 28 27 26 25 24 23
43 44
13 12 11
RD
TP1:RD
TP8:OTR
DRVDD
VCC
GND
Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
U4
74HC541
G1
G2 A1 A2 A3 A4 A5 A6 A7 A8
U2
74HC245
DIR A1 A2 A3 A4 A5 A6 A7 A8 GND
VCC
OUT_EN
B1 B2 B3 B4 B5 B6 B7 B8
U3
74HC245
DRVDD
DRVDD
DRVDD DRVDD
TP10
JP15
CT1
CT2 CT3 CT4 CT5 CT6 CT7 CT8
CT9
CT10 CT11 CT12 CT13 CT14 CT15 CT16
CT18
CT17
DATA OUTPUT BLOCK
J2
J3J4J5
RESET CS
READ DAV
DRVDD
R5 49.9Ω
R28
10kΩ
R6
49.9Ω
R29
10kΩ
R30
49.9Ω
R7
10kΩ
DATA OUTPUT CONTROL BLOCK
JP5:EXT REF
JP6:1V REF
JP7:2.5V REF
JP9:EXT REF
MDAVDD
REFERENCE CONFIGURATION BLOCK
+
C10
10µF
10µF
10µF
10µF
C11
TP6
MDAVDD
JP4:1× JP3:4× JP2:2× JP1:8×
MODE/OSR CONTROL BLOCK
TP2
TP3
TP4:REFB TP5:REFT
C5 0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
C4C2
R2
2kΩ
C1
C3
C6 C7
W1
W2
INVDD
DVDD
FLAVDD
CT20
C61 C62
DVDD
CT19
J1
CLKIN
RD
MODE
REFCOM
BIAS CAPB CAPT AVSS CML NC VINA VINB NC AVDD
VREF
SENSE
RESET
AVSS
AVDD
CS
DAV
OTR
BIT01(MSB)
BIT02
DVSS
AVSS
DVDD
AVDD
DRVSS
DRVDD
CLK
READ
BIT16(LSB)
BIT15
BIT14
BIT13 BIT12 BIT11 BIT10 BIT09 BIT08 BIT07 BIT06 BIT05 BIT04 BIT03
AD9260
CML
VINA
VINB
1V
CML
VREFEXT
R27 49.9kΩ
C8
R33 1kΩ
JP13
JP11
R31 1kΩ
RESETB CSBBUE
TP15
AGND
DC COUPLED
AC COUPLED
SHIELDED_TRACE
NC = NO CONNECT
MDAVDD
DIR A1 A2 A3 A4 A5 A6 A7 A8 GND
VCC
OUT_EN
B1 B2 B3 B4 B5 B6 B7 B8
00581-C-078
Figure 78. Evaluation Board Top Level Schematic