Datasheet

AD9258
Rev. A | Page 11 of 44
t
PD
t
SKEW
t
CH
t
DCO
t
CLK
CH A
N – 12
CH B
N – 12
CH A
N – 11
CH B
N – 11
CH A
N – 10
CH B
N – 10
CH A
N – 9
CH B
N – 9
CH A
N – 8
N – 1
N + 1
N + 2
N + 3
N + 5
N + 4
N
VIN
CLK+
CLK–
CH A/CH B DATA
DCOA/DCOB
t
A
08124-003
Figure 4. LVDS Mode Data Output Timing
SYNC
CLK+
t
SSYNC
t
HSYNC
08124-004
Figure 5. SYNC Input Timing Requirements