Datasheet
Data Sheet AD9255
Rev. C | Page 37 of 44
MEMORY MAP REGISTER TABLE
All address and bit locations that are not included in Table 17 are not currently supported for this device.
Table 17. Memory Map Registers
Addr.
(Hex)
Register
Name
Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
Default
Value
(Hex)
Default Notes/
Comments
Chip Configuration Registers
0x00 SPI port
configuration
0 LSB first Soft reset 1 1 Soft reset LSB
first
0 0x18 The nibbles are
mirrored so
LSB-first mode
or MSB-first
mode registers
correctly,
regardless of
shift mode
0x01 Chip ID 8-Bit Chip ID[7:0], AD9255 = 0x65 (default) 0x65 Read only
0x02 Chip grade Open Open Speed grade ID Open Open Open Open Speed grade ID
used to
differentiate
devices; read
only
01 = 125 MSPS
10 = 105 MSPS
11 = 80 MSPS
Transfer Register
0xFF Transfer Open Open Open Open Open Open Open Transfer 0x00 Synchronously
transfers data
from the
master shift
register to the
slave
ADC Functions Registers
0x08 Power
modes
1 Open External power-
down pin
function
Open Open Open Internal
power-down
mode
0x80 Determines
various generic
modes of chip
operation
0 = power-
down
00 = normal
operation
1 = standby 01 = full power-
down
10 = standby
11 = normal
operation
0x09 Global clock Open Open Open Open Open Open Open Duty
cycle
stabilizer
(default)
0x01
0x0B Clock divide
(global)
Open Open Open Open Open Clock divide ratio
000 = divide by 1
001 = divide by 2
010 = divide by 3
011 = divide by 4
100 = divide by 5
101 = divide by 6
110 = divide by 7
111 = divide by 8
0x00 Clock divide
values other
than 000
automatically
cause the duty
stabilizer to
become active.
0x0D Test mode Open Open Reset PN23
generator
Reset PN9
generator
Open Output test mode 0x00 When this
register is set,
the test data is
placed on the
output pins in
place of normal
data
000 = off (default)
001 = midscale short
010 = positive FS
011 = negative FS
100 = alternating checkerboard
101 = PN 23 sequence
110 = PN 9 sequence
111 = one/zero word toggle
0x0E BIST enable Open Open Open Open Open Reset BIST
sequence
Open BIST
enable
0x04