Datasheet

AD9248
Rev. B | Page 3 of 48
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B; A
IN
= −0.5 dBFS differential input, 1.0 V internal reference,
T
MIN
to T
MAX
, DCS enabled, unless otherwise noted.
Table 1.
Test AD9248BST/BCP-20 AD9248BST/BCP-40 AD9248BST/BCP-65
Parameter Temp Level Min Typ Max Min Typ Max Min Typ Max Unit
RESOLUTION Full VI 14 14 14 Bits
ACCURACY
No Missing Codes Guaranteed Full VI 14 14 14 Bits
Offset Error 25°C I ±0.2 ±1.3 ±0.2 ±1.3 ±0.2 ±1.3 % FSR
Gain Error
1
Full IV ±0.25 ±2.2 ±0.3 ±2.4 ±0.5 ±2.5 % FSR
Differential Nonlinearity (DNL)
2
Full V ±0.65 ±0.65 ±0.7 LSB
25°C IV ±0.6 ±1.0 ±0.6 ±1.0 ±0.65 ±1.0 LSB
Integral Nonlinearity (INL)
2
Full V ±2.7 ±2.7 ±2.8 LSB
25°C IV ±2.3 ±4.5 ±2.3 ±4.5 ±2.4 ±4.5 LSB
TEMPERATURE DRIFT
Offset Error Full V ±2 ±2 ±3 ppm/°C
Gain Error
1
Full V ±12 ±12 ±12 ppm/°C
INTERNAL VOLTAGE REFERENCE
Output Voltage Error (1 V Mode) Full VI ±5 ±35 ±5 ±35 ±5 ±35 mV
Load Regulation @ 1.0 mA Full V 0.8 0.8 0.8 mV
Output Voltage Error (0.5 V Mode) Full V ±2.5 ±2.5 ±2.5 mV
Load Regulation @ 0.5 mA Full V 0.1 0.1 0.1 mV
INPUT REFERRED NOISE
Input Span = 1 V 25°C V 2.1 2.1 2.1 LSB rms
Input Span = 2.0 V 25°C V 1.05 1.05 1.05 LSB rms
ANALOG INPUT
Input Span = 1.0 V Full IV 1 1 1 V p-p
Input Span = 2.0 V Full IV 2 2 2 V p-p
Input Capacitance
3
Full V 7 7 7 pF
REFERENCE INPUT RESISTANCE Full V 7 7 7 kΩ
POWER SUPPLIES
Supply Voltages
AVDD Full IV 2.7 3.0 3.6 2.7 3.0 3.6 2.7 3.0 3.6 V
DRVDD Full IV 2.25 3.0 3.6 2.25 3.0 3.6 2.25 3.0 3.6 V
Supply Current
IAVDD
2
Full V 60 110 200 mA
IDRVDD
2
Full V 5 11 16 mA
PSRR Full V ±0.01 ±0.01 ±0.01 % FSR
POWER CONSUMPTION
DC Input
4
Full V 180 330 600 mW
Sine Wave Input
2
Full VI 190 217 360 400 640 700 mW
Standby Power
5
Full V 2.0 2.0 2.0 mW