Datasheet

AD9244
Rev. C | Page 27 of 36
Table 14. Clock Jumper Configuration
Clock Input Input Connector Jumpers
DUT CLOCK
Differential S5 11, 13
Single-Ended S1 12, 15
AD9226-Compatible S1 12, 14
DATA CAPTURE CLOCK
Internal
Differential DUT Clock N/A 9, 18A
Single-Ended DUT Clock N/A 9, 18B
External S6 3 or 4
REFIN
10MHz
REFOUT
SIGNAL SYNTHESIZER
2.5MHz, 0.8V p-p
HP8644
CLK SYNTHESIZER
65MHz, 1V p-p
HP8644
2.5MHz
BAND-PASS FILTER
AVDD GNDDUT
AVDD
GND DUT
DVDD
DVDD
AD9244
EVALUATION BOARD
OUTPUT
BUSS
J1
S4
INPUT
xFMR
S1/S5
INPUT
CLOCK
DSP
EQUIPMENT
CLOCK
DIVIDER
5V
+–
5V
+–
3V
+–
3V
+–
02404-064
Figure 64. Evaluation Board Connections