Datasheet

AD9244
Rev. C | Page 21 of 36
Using an External Reference
To use an external reference, the internal reference must be dis-
abled by connecting the SENSE pin to AVDD. The AD9244
contains an internal reference buffer, A2 (see
Figure 48), that
simplifies the drive requirements of an external reference. The
external reference must be able to drive a 5 kΩ (±20%) load.
The bandwidth of the reference is deliberately left small to
minimize the reference noise contribution. As a result, it is not
possible to drive VREF externally with high frequencies.
Figure 51 shows an example of an external reference driving
both VIN– and VREF. In this case, both the common-mode
voltage and input span are directly dependent on the value of
VREF. Both the input span and the center of the input span are
equal to the external VREF. Thus, the valid input range extends
from (VREF + VREF/2) to (VREF − VREF/2). For example, if
the Precision Reference Part
REF191, a 2.048 V external refer-
ence, is used, the input span is 2.048 V. In this case, 1 LSB of the
AD9244 corresponds to 0.125 mV.
It is essential that a minimum of a 10 μF capacitor, in parallel
with a 0.1 μF low inductance ceramic capacitor, decouple the
reference output to AGND.
5
V
AVDD
REFT
REFB
VREF
SENSE
AD9244
VIN+
VIN–
33Ω
20pF
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
10μF
10μF
33Ω
+
+
VREF + VREF/2
VREF – VREF/2
VREF
02404-051
Figure 51. Using an External Reference
Digital Outputs
Table 10 details the relationship among the ADC input, OTR,
and digital output format.
Data Format Select (DFS)
The AD9244 can be programmed for straight binary or twos
complement data on the digital outputs. Connect the DFS pin to
AGND for straight binary and to AVDD for twos complement.
Digital Output Driver Considerations
The AD9244 output drivers can be configured to interface with
5 V or 3.3 V logic families by setting DRVDD to 5 V or 3.3 V,
respectively. The output drivers are sized to provide sufficient
output current to drive a wide variety of logic families.
However, large drive currents tend to cause glitches on the
supplies and can affect converter performance. Applications
requiring the ADC to drive large capacitive loads or large
fanouts can require external buffers or latches.
DIGITAL INPUTS AND OUTPUTS
Table 10. Output Data Format
Input (V) Condition (V) Binary Output Mode Twos Complement Mode OTR
VIN+ – VIN− < –VREF/2 − 0.5 LSB 00 0000 0000 0000 10 0000 0000 0000 1
VIN+ – VIN− = −VREF/2 00 0000 0000 0000 10 0000 0000 0000 0
VIN+ – VIN− = 0 10 0000 0000 0000 00 0000 0000 0000 0
VIN+ – VIN− = +VREF/2 − 1.0 LSB 11 1111 1111 1111 01 1111 1111 1111 0
VIN+ – VIN− > +VREF/2 − 0.5 LSB 11 1111 1111 1111 01 1111 1111 1111 1