Datasheet

AD9230
Rev. 0 | Page 3 of 32
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, T
MIN
= −40°C, T
MAX
= +85°C, f
IN
= −1.0 dBFS, full scale = 1.25 V, DCS enabled, unless otherwise noted.
Table 1.
AD9230-170 AD9230-210 AD9230-250
Parameter
1
Temp Min Typ Max Min Typ Max Min Typ Max Unit
RESOLUTION 12 12 12 Bits
ACCURACY
No Missing Codes Full Guaranteed Guaranteed Guaranteed
Offset Error 25°C 4.2 4.3 4.5 mV
Full −12 12 −12 12 −12 12 mV
Gain Error 25°C 0.89 1.0 1.1 mV
Full −1.5 3.5 −1.5 3.5 −1.5 3.5 % FS
Differential Nonlinearity 25°C ±0.3 ±0.3 ±0.3 LSB
(DNL) Full −0.5 0.5 −0.5 0.5 −0.6 0.6 LSB
Integral Nonlinearity (INL) 25°C ±0.5 ±0.4 ±0.5 LSB
Full −0.75 0.75 −0.75 0.75 −1.0 +1.0 LSB
TEMPERATURE DRIFT
Offset Error Full
±9 ±8 ±7
μV/°C
Gain Error Full 0.019 0.021 0.018 %/°C
ANALOG INPUTS (VIN+, VIN−)
Differential Input Voltage Range
2
Full 0.98 1.25 1.5 0.98 1.25 1.5 0.98 1.25 1.5 V p-p
Input Common-Mode Voltage Full 1.4 1.4 1.4 V
Input Resistance (Differential) Full 4.3 4.3 4.3 kΩ
Input Capacitance 25°C 2 2 2 pF
POWER SUPPLY
AVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 V
DRVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 V
Supply Currents
I
AVDD
3
Full 136 145 154 164 181 194 mA
I
DRVDD
3
/SDR Mode
4
Full 58 61 59 62 60 63 mA
I
DRVDD
3
/DDR Mode
5
Full 39 40 41 mA
Power Dissipation
3
Full mW
SDR Mode
4
Full 349 371 383 407 434 463 mW
DDR Mode
5
Full 315 349 400 mW
1
See the AN-835 Application Note, “Understanding High Speed ADC Testing and Evaluation,” for a complete set of definitions and how these tests were completed.
2
The input range is programmable through the SPI, and the range specified reflects the nominal values of each setting. See the Memory Map section.
3
I
AVDD
and I
DRVDD
are measured with a −1 dBFS, 10.3 MHz sine input at rated sample rate.
4
Single data rate mode; this is the default mode of the AD9230.
5
Double data rate mode; user-programmable feature. See the Memory Map section.