Datasheet

AD9229
Rev. B | Page 6 of 40
SWITCHING SPECIFICATIONS
AVDD = 3.0 V, DRVDD = 3.0 V, maximum conversion rate, 2 V p-p differential input, 1.0 V internal reference, AIN = –0.5 dBFS, unless
otherwise noted.
Table 4.
AD9229-50 AD9229-65
Parameter Temp
Test
Level
Min Typ Max Min Typ Max Unit
CLOCK
Maximum Clock Rate Full VI 50 65 MSPS
Minimum Clock Rate Full IV 10 10 MSPS
Clock Pulse Width High
(t
EH
)
Full VI 8 10 6.2 7.7 ns
Clock Pulse Width Low
(t
EL
)
Full VI 8 10 6.2 7.7 ns
OUTPUT PARAMETERS
Propagation Delay (t
PD
) Full VI 3.3 6.5 7.9 3.3 6.5 7.9 ns
Rise Time (t
R
)
(20% to 80%)
Full V 250 250 ps
Fall Time (t
F
)
(20% to 80%)
Full V 250 250 ps
FCO Propagation Delay
(t
FCO
)
Full V 6.5 6.5 ns
DCO Propagation Delay
(t
CPD
)
Full V t
FCO
+
(t
SAMPLE
/24)
t
FCO
+
(t
SAMPLE
/24)
ns
DCO-to-Data Delay (t
DATA
) Full IV (t
SAMPLE
/24) –
250
(t
SAMPLE
/24) (t
SAMPLE
/24) +
250
(t
SAMPLE
/24) –
250
(t
SAMPLE
/24) (t
SAMPLE
/24) +
250
ps
DCO-to-FCO Delay (t
FRAME
) Full IV (t
SAMPLE
/24) –
250
(t
SAMPLE
/24) (t
SAMPLE
/24) +
250
(t
SAMPLE
/24) –
250
(t
SAMPLE
/24) (t
SAMPLE
/24) +
250
ps
Data-to-Data Skew
(t
DATA-MAX
– t
DATA-MIN
)
Full IV ±100 ±250 ±100 ±250 ps
Wake-Up Time 25°C V 4 4 ms
Pipeline Latency Full IV 10 10 CLK
cycles
APERTURE
Aperture Delay (t
A
) 25°C V 1.8 1.8 ns
Aperture Uncertainty
(Jitter)
25°C V <1 <1 ps
rms
OUT-OF-RANGE RECOVERY
TIME
25°C V 2 2 CLK
cycles