Datasheet

AD9228 Data Sheet
Rev. E | Page 8 of 56
TIMING DIAGRAMS
DCO–
DCO+
D – x
D + x
FCO–
FCO+
VIN ± x
CLK–
CLK+
MSB
N – 9
D10
N – 9
D9
N – 9
D8
N – 9
D7
N – 9
D6
N – 9
D5
N – 9
D4
N – 9
D3
N – 9
D2
N – 9
D1
N – 9
D0
N – 9
D10
N – 8
MSB
N – 8
05727-039
N – 1
N
t
DATA
t
FRAME
t
FCO
t
PD
t
CPD
t
EH
t
A
t
EL
Figure 2. 12-Bit Data Serial Stream, MSB First (Default)
DCO+
DCO–
CLK+
FCO+
FCO–
D – x
D + x
CLK–
V
IN ± x
MSB
N – 9
N – 1
N
D8
N – 9
D7
N – 9
D5
N – 9
t
DATA
t
FRAME
t
FCO
t
PD
D4
N – 9
D6
N – 9
D8
N – 8
D7
N – 8
D5
N – 8
D6
N – 8
D3
N – 9
D1
N – 9
MSB
N – 8
D0
N – 9
D2
N – 9
t
CPD
t
EH
t
A
t
EL
05727-040
Figure 3. 10-Bit Data Serial Stream, MSB First