Datasheet

AD9228 Data Sheet
Rev. E | Page 22 of 56
For best dynamic performance, the source impedances driving
VIN + x and VIN − x should be matched such that common-
mode settling errors are symmetrical. These errors are reduced
by the common-mode rejection of the ADC. An internal
reference buffer creates the positive and negative reference
voltages, REFT and REFB, respectively, that define the span of
the ADC core. The output common-mode of the reference buffer
is set to midsupply, and the REFT and REFB voltages and span
are defined as
REFT = 1/2 (AVDD + VREF)
REFB = 1/2 (AVDDVREF)
Span = 2 × (REFTREFB) = 2 × VREF
It can be seen from these equations that the REFT and REFB
voltages are symmetrical about the midsupply voltage and, by
definition, the input span is twice the value of the VREF voltage.
Maximum SNR performance is achieved by setting the ADC to
the largest span in a differential configuration. In the case of the
AD9228, the largest input span available is 2 V p-p.
Differential Input Configurations
There are several ways to drive the AD9228 either actively or
passively; however, optimum performance is achieved by driving
the analog input differentially. For example, using the AD8332
differential driver to drive the AD9228 provides excellent perfor-
mance and a flexible interface to the ADC (see Figure 51) for
baseband applications. This configuration is commonly used
for medical ultrasound systems.
For applications where SNR is a key parameter, differential
transformer coupling is the recommended input configuration
(see Figure 48 and Figure 49), because the noise performance of
most amplifiers is not adequate to achieve the true performance
of the AD9228.
Regardless of the configuration, the value of the shunt capacitor,
C, is dependent on the input frequency and may need to be
reduced or removed.
05727-008
2V p-p
R
R
*C
DIFF
C
*C
DIFF IS OPTIONAL
49.9
0.1F
1k
1k
AGND
AVDD
A
DT1-1WT
1:1 Z RATIO
VIN – x
ADC
AD9228
VIN + x
C
Figure 48. Differential Transformer-Coupled Configuration
for Baseband Applications
ADC
AD9228
05727-047
2V p-p
2.2pF 1k
0.1F
1k
1k
AVDD
A
DT1-1WT
1:1 Z RATIO
16nH
16nH
0.1F
16nH
33
33
499
65
VIN + x
VIN – x
Figure 49. Differential Transformer-Coupled Configuration
for IF Applications
Single-Ended Input Configuration
A single-ended input may provide adequate performance in cost-
sensitive applications. In this configuration, SFDR and distortion
performance degrade due to the large input common-mode swing.
If the application requires a single-ended input configuration,
ensure that the source impedances on each input are well matched
in order to achieve the best possible performance. A full-scale
input of 2 V p-p can be applied to the ADC’s VIN + x pin while
the VIN − x pin is terminated. Figure 50 details a typical single-
ended input configuration.
0
5727-009
2
V p-
p
R
R
49.9
0.1µF
0.1µF
AVDD
1k
25
1k
1k
V
DD
VIN – x
ADC
AD9228
VIN + x
*C
DIFF
C
*C
DIFF IS OPTIONAL
C
Figure 50. Single-Ended Input Configuration
AD8332
1k
187
187
0.1
F
0.1F
0.1F
1V p-p
0.1F
LNA
120nH
VGA
VOH
VIP
INH
22pF
LMD
VIN
LOP
LON
VOL
18nF
274
VIN – x
ADC
AD9228
VIN + x
05727-007
LPF
+
68pF
33
33
AVDD
AVDD
680nH
680nH
10k
10k
10k
10k
Figure 51. Differential Input Configuration Using the AD8332 with Two-Pole, 16 MHz Low-Pass Filter