Datasheet

AD9218
Rev. C | Page 7 of 28
02001-003
1/f
S
t
A
t
EH
t
EL
t
PD
t
V
SAMPLE
N
ENCODE A
ENCODE B
D9
A
TO D0
A
D9
B
TO D0
B
A
IN
A
A
IN
B
DATA N – 10 DATA N – 8 DATA N – 6 DATA N – 4 DATA N – 2 DATA N DATA N + 2
DATA N – 9 DATA N – 7 DATA N – 5 DATA N – 3 DATA N – 1 DATA N + 1
SAMPLE
N + 1
SAMPLE
N + 2
SAMPLE
N + 7
SAMPLE
N + 8
SAMPLE
N + 3
SAMPLE
N + 4
SAMPLE
N + 5
SAMPLE
N + 6
Figure 3. Normal Operation with Two Clock Sources (S1 = 1, S2 = 0) Channel Timing
02001-004
1/f
S
t
A
t
EH
t
EL
t
PD
t
V
SAMPLE
N
ENCODE A
ENCODE B
D9
A
TO D0
A
D9
B
TO D0
B
A
IN
A
A
IN
B
DATA N – 10 DATA N – 8 DATA N – 6 DATA N – 4 DATA N – 2 DATA N
DATA N – 11 DATA N – 9 DATA N – 7 DATA N – 5 DATA N – 3 DATA N – 1 DATA N + 1
SAMPLE
N + 1
SAMPLE
N + 2
SAMPLE
N + 7
SAMPLE
N + 8
SAMPLE
N + 3
SAMPLE
N + 4
SAMPLE
N + 5
SAMPLE
N + 6
DATA N + 2
Figure 4. Data Align with Two Clock Sources (S1 = 1, S2 = 1) Channel Timing