Datasheet

AD9216
Rev. A | Page 7 of 40
TIMING DIAGRAM
t
A
N–8 N–7 N–6 N–5 N–4 N–3 N–2 N–1 N N+1
N–1
N
N+1
N+2
N+3
N+4
N+5
N+6
N+7
N+8
t
PD
ANALOG
INPUT
CLK
DATA
OUT
04775-002
Figure 2.