Datasheet

AD9216
Rev. A | Page 5 of 40
LOGIC SPECIFICATIONS
AVDD = 3.0 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B; A
IN
= −0.5 dBFS differential input, 1.0 V internal reference,
T
MIN
to T
MAX
, DCS enabled, unless otherwise noted.
Table 3.
AD9216BCPZ-65 AD9216BCPZ-80 AD9216BCPZ-105
Parameter Temp Test
Level
Min Typ Max Min Typ Max Min Typ Max Unit
LOGIC INPUTS
High Level Input
Voltage
Full IV 2.0 2.0 2.0 V
Low Level Input
Voltage
Full IV 0.8 0.8 0.8 V
High Level Input
Current
Full IV −10 +10 −10 +10 −10 +10 µA
Low Level Input
Current
Full IV −10 +10 −10 +10 −10 +10 µA
Input Capacitance Full IV 2 2 2 pF
LOGIC OUTPUTS
1
DRVDD = 2.5 V
High Level Output
Voltage
Full IV 2.45 2.45 2.45 V
Low Level Output
Voltage
Full IV 0.05 0.05 0.05 V
1
Output voltage levels measured with 5 pF load on each output.