Datasheet

Data Sheet AD9148
Rev. B | Page 5 of 72
SPECIFICATIONS
DC SPECIFICATIONS
T
MIN
to T
MAX
, AVDD33 = 3.3 V, IOVDD = 3.3 V, DVDD18 = 1.8 V, CVDD18 = 1.8 V, I
OUTFS
= 20 mA, maximum sample rate, unless
otherwise noted.
Table 1.
Parameter Min Typ Max Unit
RESOLUTION 16 Bits
ACCURACY
Differential Nonlinearity (DNL) ±2.1 LSB
Integral Nonlinearity (INL) ±3.7 LSB
MAIN DAC OUTPUTS
Offset Error ±0.001 % FSR
Gain Error (with Internal Reference) ±2 % FSR
Full-Scale Output Current
1
8.66 20.2 31.66 mA
Output Compliance Range
−1.0
+1.0
V
Output Resistance 10 MΩ
Gain DAC Monotonicity Guaranteed
Settling Time to Within ±0.5 LSB 20 ns
TEMPERATURE DRIFT
Main DAC Offset 0.04 ppm/°C
Main DAC Gain 100 ppm/°C
Reference Voltage 30 ppm/°C
REFERENCE
Internal Reference Voltage 1.2 V
Output Resistance 5 kΩ
ANALOG SUPPLY VOLTAGES
AVDD33 3.13 3.3 3.47 V
CVDD18 1.71 1.8 1.89 V
DIGITAL SUPPLY VOLTAGES
IOVDD 1.71 1.8/3.3 3.47 V
DVDD18 1.71 1.8 1.89 V
POWER CONSUMPTION (NCO OFF, PLL DISABLED, AND SINC
−1
FILTER BYPASSED,
UNLESS OTHERWISE NOTED)
1 × Mode, f
DAC
= 300 MSPS, f
INTERFACE
= 600 MSPS 0.79 W
2 × Mode, f
DAC
= 500 MSPS, f
INTERFACE
= 500 MSPS 1.49 W
4 × Mode, f
DAC
= 800 MSPS, f
INTERFACE
= 400 MSPS 2.18 W
4 × Mode, f
DAC
= 800 MSPS, f
INTERFACE
= 400 MSPS, NCO On 2.47 W
4 × Mode, f
DAC
= 800 MSPS, f
INTERFACE
= 400 MSPS, PLL Enabled 2.26 W
4 × Mode, f
DAC
= 800 MSPS, f
INTERFACE
= 400 MSPS, Sinc
−1
Filter Enabled 2.44 W
8 × Mode, f
DAC
= 800 MSPS, f
INTERFACE
= 200 MSPS
2.01
2.16
W
AVDD33 368 373 mW
CVDD18 261 280 mW
IOVDD 0.8 1.6 mW
DVDD18 1377 1504 mW
Power-Down Mode 1 12 mW
OPERATING RANGE −40 +25 +85 °C
1
Based on a 10 kΩ external resistor.