Datasheet

Data Sheet AD9148
Rev. B | Page 3 of 72
REVISION HISTORY
1/12—Rev. A to Rev. B
Change to Chip ID Default Value, Table 12 ................................. 25
Change to Chip ID Readback Value, Table 1 3 ............................. 32
Changed 0x02 to 0x0A ................................................................... 65
9/11—Rev. 0 to Rev. A
Changes to General Description Section ....................................... 1
Deleted Input High Voltage, V
IA
or V
IB
Parameter, Table 2, Input
Low Voltage, V
IA
or V
IB
Parameter, Table 2, and
Note 2, Table 2; Renumbered Sequentially .................................... 6
Added Input Voltage Range, V
IA
or V
IB
Parameter, Table 2 ......... 6
Changes to Table 10 ........................................................................ 13
Changes to Figure 41 and Figure 42 ............................................. 23
Changes to 0x1E Addr, Table 12 .................................................... 24
Deleted 0x74 Row, Table 12 ........................................................... 26
Changes to PLL Control 2, Table 13 ............................................. 29
Changes to HB3 Control, 1E, Bit 7 Row, Table 13 ...................... 32
Deleted LVDS Pad Ctrl Row, Table 13 .......................................... 38
Deleted Frame Input Levels Section and Table 15 ...................... 41
Added Recommended Frame Input Bias Circuitry Section and
Figure 45; Renumbered Sequentially ............................................ 41
Changes to Timing Optimization Section ................................... 48
Added Table 15 ................................................................................ 48
Changes to Filter Implementation Section .................................. 50
Changes to Figure 74 ...................................................................... 57
Deleted Test Access Port Section, Table 27, Figure 92, and
Table 28 ............................................................................................. 68
Changes to Start-Up Sequence Section ........................................ 68
Deleted Figure 93 ............................................................................ 69
Deleted Table 29 .............................................................................. 70
6/10—Revision 0: Initial Version