Datasheet

Data Sheet AD9148
Rev. B | Page 27 of 72
Register Name
Addr
(Hex) Bit Name Function Default
Data Format 03 7 Binary format
Input data is in twos complement format (0) or unsigned
binary format (1).
0
6 Q first enable Indicates I/Q data pairing on data input; I first (0), Q first (1). 0
5 Dual-port mode Number of input data ports used. 1
Single port (0), dual port (1).
4 Bus swap 0 = normal data input bus pin out (MSB to LSB). 0
1 = inverted data input bus pin out (LSB to MSB).
3
Byte mode
0 = data input bus is 16-bit wide on each port.
0
1 = data input bus is two 8-bit wide buses on Port A.
2 Byte swap 0 = normal data input bus pin out (MSB to LSB). 0
1 = inverted data input bus pin out (LSB to MSB).
Interrupt Enable 0 04 7 Enable PLL lock lost Enables interrupt for PLL lock lost. 0
6
Enable PLL lock
Enables interrupt for PLL lock.
0
5
Enable sync
lock lost
Enables interrupt for sync lock lost. 0
4 Enable sync lock Enables interrupt for sync lock. 0
2
Enable FIFO
SPI aligned
Enables interrupt for FIFO SPI aligned. 0
1
Enable FIFO
Warning 1
Enables interrupt for FIFO Warning 1.
0
0
Enable FIFO
Warning 2
Enables interrupt for FIFO Warning 2. 0
Interrupt Enable 1 05 4
Enable AED
compare pass
Enables interrupt for AED compare pass. 0
3
Enable AED
compare fail
Enables interrupt for AED compare fail. 0
2
Enable SED
compare fail
Enables interrupt for SED compare fail. 0