Datasheet

Data Sheet AD9148
Rev. B | Page 25 of 72
Addr
Register
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default
0x1F Chip ID Chip ID[7:0] 0x07
0x20
1
Coeff I Byte 0 0 Coeff_1i[3:0] Coeff_0i[2:0] 0x00
0x21
1
Coeff I Byte 1 Coeff_3i[2:0] Coeff_2i[4:0] 0xC0
0x22
1
Coeff I Byte 2 Coeff_4i[2:0] 0 Coeff_3i[6:3] 0xEF
0x23
1
Coeff I Byte 3 0 Coeff_4i[9:3] 0x7F
0x24
1
Coeff Q Byte 0 0 Coeff_1q[3:0] Coeff_0q[2:0] 0x69
0x25
1
Coeff Q Byte 1 Coeff_3q[2:0] Coeff_2q[4:0] 0xE6
0x26
1
Coeff Q Byte 2 Coeff_4q[2:0] 0 Coeff_3q[6:3] 0x0D
0x27
1
Coeff Q Byte 3 0 Coeff_4q[9:3] 0x00
0x28
1
I phase adj LSB Phase Word I[7:0] 0x00
0x29
1
I phase adj
MSB
Phase Word I[9:8] 0x00
0x2A
1
Q phase adj
LSB
Phase Word Q[7:0] 0x00
0x2B
1
Q phase adj
MSB
Phase Word Q[9:8] 0x00
0x2C
1
I DC offset LSB DC Offset I[7:0] 0x00
0x2D
1
I DC offset
MSB
DC Offset I[15:8] 0x00
0x2E
1
Q DC offset
LSB
DC Offset Q[7:0] 0x00
0x2F
1
Q DC offset
MSB
DC Offset Q[15:8] 0x00
0x30
1
IDAC FSC adj IDAC FSC Adj[7:0] 0xF9
0x31
1
IDAC control IDAC sleep IDAC FSC Adj[9:8] 0x01
0x32
1
AUX IDAC data AUX IDAC Data[7:0] 0x00
0x33
1
AUX IDAC
control
AUX IDAC
sign
AUX IDAC
current
direction
AUX IDAC
power-
down
AUX IDAC Data[9:8] 0x00
0x34
1
QDAC FSC adj QDAC FSC Adj[7:0] 0xF9
0x35
1
QDAC control QDAC sleep QDAC FSC Adj[9:8] 0x01
0x36
1
AUX QDAC
data
AUX QDAC Data[7:0] 0x00
0x37
1
AUX QDAC
control
AUX QDAC
sign
AUX QDAC
current
direction
AUX QDAC
power-
down
AUX QDAC Data[9:8] 0x00
0x38
1
SED_S0_L SED Compare Pattern Sample0[7:0] 0xB6
0x39
1
SED_S0_H SED Compare Pattern Sample0[15:8] 0x7A
0x3A
1
SED_S1_L SED Compare Pattern Sample1[7:0] 0x45
0x3B
1
SED_S1_H SED Compare Pattern Sample1[15:8] 0xEA
0x3C
1
SED3_S2_L SED Compare Pattern Sample2[7:0] 0x16
0x3D
1
SED3_S2_H SED Compare Pattern Sample2[15:8] 0x1A
0x3E
1
SED4_S3_L SED Compare Pattern Sample3[7:0] 0xC6
0x3F
1
SED4_S3_H SED Compare Pattern Sample3[15:8] 0xAA
0x40 SED control/
status
SED
compare
enable
Port B
error
detected
Port A
error
detected
Auto-
clear
enable
Port B
compare
failed
Port A
compare
failed
Compare
passed
0x00
0x41
1
SED_R_L SED Status Rising Edge Samples[7:0]
0x42
1
SED_R_H SED Status Rising Edge Samples[15:8]
0x43
1
SED_F_L SED Status Falling Edge Samples[7:0]
0x44
1
SED_F_H SED Status Falling Edge Samples[15:8]
0x50
1
I gain control I Gain[7:0] 0x40
0x51
1
Q gain control Q Gain[7:0] 0x40